LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 499

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
Fig 106. IPR register
28.6.2.5 Interrupt Clear-pending Register
28.6.2.6 Interrupt Priority Registers
Q
The ICPR removes the pending state from interrupts, and shows which interrupts are
pending. See the register summary in
The bit assignments are:
Table 445. ICPR bit assignments
Remark: Writing 1 to an ICPR bit does not affect the active state of the corresponding
interrupt.
The IPR0-IPR7 registers provide an 2-bit priority field for each interrupt. These registers
are only word-accessible. See the register summary in
Each register holds four priority fields as shown:
Table 446. IPR bit assignments
Bits
[31:0]
Bits
[31:24]
[23:16]
[15:8]
[7:0]
•
a disabled interrupt sets the state of that interrupt to pending.
Name
Priority, byte offset 3
Priority, byte offset 2
Priority, byte offset 1
Priority, byte offset 0
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Name
CLRPEND
Rev. 12 — 24 September 2012
Function
Each priority field holds a priority value, 0-3. The lower the
value, the greater the priority of the corresponding interrupt.
The processor implements only bits[7:6] of each field, bits
[5:0] read as zero and ignore writes.
Function
Interrupt clear-pending bits.
Write:
0 = no effect
1 = removes pending state an interrupt.
Read:
0 = interrupt is not pending
1 = interrupt is pending.
Table 28–440
for the register attributes.
Table 28–440
for their attributes.
UM10398
© NXP B.V. 2012. All rights reserved.
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