Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 120

KIT DEV FOR Z8F642 MCU 44 PIN

Z8F16800144ZCOG

Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F16800144ZCOG

Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
PS025011-1010
TxIN (ideal)
Noise Filter
Up/Dn Cntr
TxIN (noisy)
Noise Filter
Output
Noise Filter
Up/Dn Cntr
Noise Filter
Output
NEF
output
Timer
Clock
Input
Input
3 3 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3
3 3 2 1 0 0 0 0 0 0 1 2 1 0 0 0 0 0 1 0 1 2 3 3 3 3 2 3 3 3 3 3 3 3
switches from 0 to 1 when the counter counts up from 10 to 11. The Noise Filter delays the
receive data by three Timer Clock cycles.
The NEF output signal is checked when the filtered TxIN input signal is sampled. The
Timer samples the filtered TxIN input near the center of the bit time. The NEF signal
must be sampled at the same time to detect whether there is noise near the center of the bit
time. The presence of noise (NEF = 1 at center of bit time) does not mean the sampled data
is incorrect, rather it is intended to be an indicator of the level of noise in the network.
Data Bit = 0
Figure 13. Noise Filter Operation
Data Bit = 0
P R E L I M I N A R Y
nominal filter delay
Data Bit = 1
Data Bit = 1
Z8 Encore! XP
Product Specification
®
Clean TxIN
example
Noise TxIN
example
F1680 Series
Timers
106

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