Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 183

KIT DEV FOR Z8F642 MCU 44 PIN

Z8F16800144ZCOG

Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F16800144ZCOG

Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
PS025011-1010
Noise Filter Control Register
When MSEL =
provides control for the digital noise filter.
Table 91. Noise Filter Control Register (U0CTL1 = F43H with MSEL = 001b)
Noise Filter Enable (NFEN)—See the bit descriptions in
Noise Filter Control (NFCTL)—This field controls the delay and noise rejection charac-
teristics of the noise filter. The wider the counter is, the more delay is introduced by the 
filter, and the wider the noise event is filtered.
BITS
FIELD
RESET
CPU ACCESS
ADDR
Note: R = Read; R/W = Read/Write
Bit Position Value
7
NFEN
[6:4]
NFCTL
[3:0]
Reserved
Noise Filter Enable
0
1
Noise Filter Control
000
001
010
011
100
101
110
111
001b
NFEN
R/W
7
0
, the Noise Filter Control Register (see
Description
Noise filter is disabled.
Noise filter is enabled. Receive data is preprocessed 
by the noise filter.
4-bit up/down counter.
5-bit up/down counter.
6-bit up/down counter.
7-bit up/down counter.
8-bit up/down counter.
9-bit up/down counter.
10-bit up/down counter.
11-bit up/down counter.
Reserved; must be 0000.
P R E L I M I N A R Y
R/W
6
0
NFCTL
R/W
5
0
R/W
F43H, F4BH
4
0
Z8 Encore! XP
R
3
0
Table 91
Table 91
Product Specification
R
2
0
on page 169.
on page 169) 
®
F1680 Series
R
1
0
LIN-UART
R
0
0
169

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