Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 182
![KIT DEV FOR Z8F642 MCU 44 PIN](/photos/9/25/92529/z8f16800144zcog_sml.jpg)
Z8F16800144ZCOG
Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Specifications of Z8F16800144ZCOG
Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
- Current page: 182 of 399
- Download datasheet (19Mb)
PS025011-1010
MPEN
0 = Disable MULTIPROCESSOR (9-bit) mode.
1 = Enable MULTIPROCESSOR (9-bit) mode.
MULTIPROCESSOR Mode (MPMD[1:0])—MULTIPROCESSOR (9-bit)
mode—bits 7 and 5.
Multiprocessor (9-Bit) Enable (MPEN)—This bit is used to enable |
MULTIPROCESSOR (9-bit) mode.
Multiprocessor Bit Transmit (MPBT)—This bit is applicable only when
MULTIPROCESSOR (9-bit) mode is enabled.
Driver Enable Polarity (DEPOL)—See the bit descriptions in
Baud Rate Generator Control (BRGCTL)—This bit causes different LIN-UART
behavior depending on whether the LIN-UART receiver is enabled (REN = 1 in the
LIN-UART Control 0 Register). When the LIN-UART receiver is not enabled, this bit
determines whether the Baud Rate Generator issues interrupts. When the LIN-UART
receiver is enabled, this bit allows Reads from the baud rate registers to return the BRG
count value instead of the reload value.
Receive Data Interrupt Enable (RDAIRQ)—See the bit descriptions
in
Infrared Encoder/Decoder Enable (IREN)—See the bit descriptions
in
10 = The LIN-UART generates an interrupt request when a received address byte matches
MPMD [1:0]—MULTIPROCESSOR Mode
00 = The LIN-UART generates an interrupt request on all received bytes
01 = The LIN-UART generates an interrupt request on all received address bytes.
11 = The LIN-UART generates an interrupt request on all received data bytes for the most
Table 90
Table 90
(data and address).
the value stored in the Address Compare Register and on all successive data bytes
until an address mismatch occurs.
recent address byte which matches the value in the Address Compare Register.
—
Multiprocessor Enable
on page 166.
on page 166.
P R E L I M I N A R Y
Z8 Encore! XP
Table 90
Product Specification
®
on page 166.
F1680 Series
LIN-UART
168
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