Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 205

• Manufacturer Part Number: Z8F16800144ZCOG
• Description: KIT DEV FOR Z8F642 MCU 44 PIN
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F16800144ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F642
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4678

Enhanced Serial Peripheral Interface
Overview
Architecture
PS025011-1010
The Enhanced Serial Peripheral Interface (ESPI) supports Serial Peripheral Interface (SPI)
and other synchronous serial interface modes such as Inter IC Sound (I
sion multiplexing (TDM). ESPI includes the following features:
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The ESPI is a full-duplex, synchronous, character-oriented channel that supports a 
four-wire interface (serial clock, transmit data, receive data and slave select). The ESPI
block consists of a shift register, data buffer register, a Baud Rate (clock) Generator,
control/status registers, and a control state machine. Transmit and receive transfers are in
synch as there is a single shift register for both transmitting and receiving data.
on page 192 displays the block diagram of ESPI.
Full-duplex, synchronous, character-oriented communication.
Four-wire interface (SS, SCK, MOSI, and MISO).
Data shift register is buffered to enable high throughput.
Master mode transfer rates up to a maximum of one-half the system clock frequency.
Slave mode transfer rates up to a maximum of one-eighth the system clock frequency.
Error detection.
Dedicated Programmable Baud Rate Generator.
Data transfer control via polling, interrupt.
P R E L I M I N A R Y
Z8 Encore! XP
Enhanced Serial Peripheral Interface
Product Specification
2
S) and time divi-
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F1680 Series
Figure 33
191