Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 256

• Manufacturer Part Number: Z8F16800144ZCOG
• Description: KIT DEV FOR Z8F642 MCU 44 PIN
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F16800144ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F642
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4678

Table 127. I2CSTATE_H
PS025011-1010
State
Encoding
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
State Name
Idle
Slave Start
Slave Bystander
Slave Wait
Master Stop2
Master Start/Restart
Master Stop1
Master Wait
Slave Transmit Data
Slave Receive Data
Slave Receive Addr1
Slave Receive Addr2
Master Transmit Data
Master Receive Data
Master Transmit Addr1
Master Transmit Addr2
State Description
I
I
Address did not match; ignore remainder of transaction.
Waiting for STOP or RESTART condition after sending a 
Not Acknowledge instruction.
Master completing STOP condition (SCL = 1, SDA = 1).
MASTER mode sending START condition (SCL = 1, SDA = 0).
Master initiating STOP condition (SCL = 1, SDA = 0).
Master received a Not Acknowledge instruction, waiting for
software to assert STOP or START control bits.
Nine substates, one for each data bit and 
one for the Acknowledge.
Nine substates, one for each data bit and 
one for the Acknowledge.
Slave receiving first address byte (7- and 10-bit addressing)
Nine substates, one for each address bit and one for the
Acknowledge.
Slave Receiving second address byte (10-bit addressing) nine
substates, one for each address bit and one for the
Acknowledge.
Nine substates, one for each data bit and one for the
Acknowledge.
Nine substates, one for each data bit and one for the
Acknowledge.
Master sending first address byte (7- and 10-bit addressing) 
nine substates, one for each address bit and one for the
Acknowledge.
Master sending second address byte (10-bit addressing) 
nine substates, one for each address bit and one for the
Acknowledge.
2
2
C bus is idle or I
C controller has received a START condition.
P R E L I M I N A R Y
2
C controller is disabled.
Z8 Encore! XP
Product Specification
I2C Master/Slave Controller
®
F1680 Series
242