Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 128

KIT DEV FOR Z8F642 MCU 44 PIN

Z8F16800144ZCOG

Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F16800144ZCOG

Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
Table 62. Timer 0–2 Control 2 Register (TxCTL2)
PS025011-1010
BITS
FIELD
RESET
R/W
ADDR
R/W
7
0
PRES—Prescale value 
The timer input clock is divided by 2PRES, where PRES can be set from 0 to 7. The
prescaler is reset each time the Timer is disabled. This insures proper clock division each
time the Timer is restarted.
000 = Divide by 1
001 = Divide by 2
010 = Divide by 4
011 = Divide by 8
100 = Divide by 16
101 = Divide by 32
110 = Divide by 64
111 = Divide by 128
TMODE[2:0]—Timer mode 
This field along with the TMODE[3] bit in TxCTL0 register determines the operating
mode of the timer. TMODE[3:0] selects among the following modes: 
0000 = ONE-SHOT mode
0001 = CONTINUOUS mode
0010 = COUNTER mode
0011 = PWM Single Output mode
0100 = CAPTURE mode
0101 = COMPARE mode
0110 = GATED mode
0111 = CAPTURE/COMPARE mode
1000 = PWM Dual Output mode
1001 = CAPTURE RESTART mode
1010 = COMPARATOR COUNTER mode
1011 = Triggered ONE-SHOT mode
1100 = DEMODULATION mode
Timer 0–2 Control 2 Register
The Timer 0–2 Control 2 (TxCTL2) registers allow selection of timer clock source and
control of timer input polarity in DEMODULATION mode.
Reserved
R/W
6
0
PWM0UE
R/W
5
0
P R E L I M I N A R Y
TPOLHI
F22H, F26H, F2AH
R/W
4
0
R/W
3
0
Reserved
Z8 Encore! XP
R/W
2
0
Product Specification
R/W
1
0
®
F1680 Series
TCLKS
R/W
0
0
Timers
114

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