Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 185

• Manufacturer Part Number: Z8F16800144ZCOG
• Description: KIT DEV FOR Z8F642 MCU 44 PIN
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F16800144ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F642
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4678

PS025011-1010
LIN-UART Address Compare Register
LIN MASTER Mode (LMST)—See the bit descriptions in
LIN SLAVE Mode (LSLV)—See the bit descriptions in
Autobaud Enable (ABEN)—See the bit descriptions in
Autobaud Interrupt Enable (ABIEN)—See the bit descriptions in
170.
LIN State Machine (LinState[1:0])—The LinState is controlled by both hardware and 
software. Software can force a state change at any time if necessary. In normal operation,
software moves the state in and out of Sleep state. For a LIN slave, software changes the state
from Sleep to Wait for Break, after which hardware cycles through the Wait for Break,
Autobaud, and Active states. Software changes the state from one of the active states to
Sleep state, if the LIN bus goes into SLEEP mode. For a LIN master, software changes the
state from Sleep to Active, where it remains till the software sets it back to the Sleep state.
After configuration, software does not alter the LinState field during operation.
Transmit Break Length (TxBreakLength)—Used in LIN mode by the master to control
the duration of the transmitted break.
The LIN-UART Address Compare Register stores the multinode network address of the
LIN-UART. When the MPMD[1] bit of the LIN-UART Control Register 0 is set, all
incoming address bytes are compared to the value stored in this Address Compare Register.
Receive interrupts and RDA assertions only occur in the event of a match, see
Table 93. LIN-UART Address Compare Register (U0ADDR = F45H)
Bit Position
[1:0]
TxBreakLength
BITS
FIELD
RESET
CPU ACCESS
ADDR
Note: R/W = Read/Write
Value
TxBreakLength
00
01
10
11
R/W
7
0
P R E L I M I N A R Y
R/W
6
0
Description
13 bit times.
14 bit times.
15 bit times.
16 bit times.
R/W
5
0
COMP_ADDR
R/W
F45H, F4DH
4
0
R/W
Z8 Encore! XP
Table 92
3
0
Table 92
Table 92
Product Specification
R/W
on page 170.
2
0
on page 170.
Table 92
on page 170.
®
R/W
F1680 Series
1
0
Table
on page
LIN-UART
R/W
93.
0
0
171