Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 184

• Manufacturer Part Number: Z8F16800144ZCOG
• Description: KIT DEV FOR Z8F642 MCU 44 PIN
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F16800144ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F642
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4678

PS025011-1010
LIN Control Register
When
operation. A more detailed discussion of each bit follows the table.
Table 92. LIN Control Register (U0CTL1 = F43H with MSEL = 010b)
BITS
FIELD
RESET
CPU ACCESS
ADDR
Note: R/W = Read/Write
Bit Position
7
LMST
6
LSLV
5
ABEN
4
ABIEN
[3:2]
LinState[1:0]
MSEL
=
010b
LMST
Value
LIN MASTER Mode
0
1
LIN SLAVE Mode
0
1
Autobaud Enable
0
1
Autobaud Interrupt Enable
0
1
LIN State Machine
00
01
10
11
R/W
, the LIN Control Register provides control for the LIN mode of 
7
0
LSLV
P R E L I M I N A R Y
R/W
6
0
Description
LIN MASTER mode not selected.
LIN MASTER mode selected (if MPEN, PEN, LSLV = 0).
LIN SLAVE mode not selected.
LIN SLAVE mode selected (if MPEN, PEN, LMST = 0).
Autobaud not enabled.
Autobaud enabled, if in LIN SLAVE mode.
Interrupt following autobaud does not occur.
Interrupt following autobaud enabled, if in LIN SLAVE
mode. When the autobaud character is received, a receive
interrupt is generated and the ATB bit is set in the Status0
Register.
Sleep state (either LMST or LSLV can be set).
Wait for Break state (only valid for LSLV = 1).
Autobaud state (only valid for LSLV = 1).
Active state (either LMST or LSLV can be set).
ABEN
R/W
5
0
ABIEN
R/W
F43H, F4BH
4
0
R/W
Z8 Encore! XP
LinState[1:0]
3
0
Product Specification
R/W
2
0
®
TxBreakLength
R/W
F1680 Series
1
0
LIN-UART
R/W
0
0
170