Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 143

KIT DEV FOR Z8F642 MCU 44 PIN

Z8F16800144ZCOG

Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F16800144ZCOG

Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
Table 71. MCT Sub-Address Register (MCTSA)
Table 72. MCT SubRegister x (MCTSRx)
PS025011-1010
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
MCT Sub-Address Register
MCT SubRegister x (0, 1, or 2)
R/W
R/W
7
X
7
X
The value written to the MCTRH is stored in a temporary holding register. When a write
to the MCTRL occurs, the temporary holding register value is written to the MCTRH.
This operation allows simultaneous updates of the 16-bit MCT Reload value.
MCTRH and MCTRL—MCT Reload Register High and Low
These two bytes form the 16-bit Reload value, {MCTRH[7:0], MCTRL[7:0]}. 
This value sets the MCT period in Modulo and Up/Down Count modes.
The MCT Sub-Address Register stores 3-bit sub-addresses for subregisters. These three
bits are from MCTSAR[2:0], all other bits are reserved. When accessing subregister 
(writing or reading), set MCTSA right value first, then access subregister by Writing or 
Reading SubRegisters 0, 1, or 2.
The MCT Subregisters 0, 1, or 2 store the 8-bit data write to subregister or 8-bit data read
from subregister. The MCT Sub-Address register selects the subregister to be written to or
read from.
R/W
R/W
X
X
6
6
R/W
R/W
X
X
5
5
P R E L I M I N A R Y
FA5H, FA6H, FA7H
R/W
R/W
X
X
4
4
MCTSRx
MCTSA
FA4H
R/W
R/W
X
X
3
3
Z8 Encore! XP
R/W
R/W
X
X
2
2
Product Specification
R/W
R/W
X
X
Multi-Channel Timer
1
1
®
F1680 Series
R/W
R/W
X
X
0
0
129

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