Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 166

• Manufacturer Part Number: Z8F16800144ZCOG
• Description: KIT DEV FOR Z8F642 MCU 44 PIN
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F16800144ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F642
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4678

®
Z8 Encore! XP
F1680 Series
Product Specification
152
The Synch character is transmitted by writing a
to the Transmit Data Register (
55H
TDRE
must = 1 before writing). The Synch character is not transmitted by the hardware till the
Break is complete.
The Identifier character is transmitted by writing the appropriate value to the Transmit
Data Register (
must = 1 before writing).
TDRE
If the master is sending the response portion of the message, these data and checksum
characters are written to the Transmit Data Register when the
bit asserts. If the
TDRE
transmit data register is written after
asserts, but before
asserts, the hardware
TDRE
TXE
inserts one or two stop bits between each character as determined by the Stop bit in the
Control 0 Register. Additional idle time occurs between characters, if
asserts before
TXE
the next character is written.
If the selected slave is sending the response portion of the frame to the master, each
receive byte will be signalled by the receive data interrupt (
bit will be set in the
RDA
Status0 register). If the selected slave is sending the response to a different slave, the mas-
ter can ignore the response characters by deasserting the
bit in the Control 0 Register
REN
until the frame time slot is completed.
LIN SLEEP Mode
While the LIN bus is in the sleep state, the CPU can either be in low power STOP mode, in
HALT mode, or in normal operational state. Any device on the LIN bus may issue a Wake-
up message if it requires the master to initiate a LIN message frame. Following the Wake-
up message, the master wakes up and initiates a new message. A Wake-up message is
accomplished by pulling the bus Low for at least 250 µs but less than 5 ms. Transmitting a
character is one way to transmit the Wake-up message.
00H
If the CPU is in STOP mode, the LIN-UART is not active and the Wake-up message must
be detected by a GPIO edge detect Stop Mode Recovery. The duration of the Stop Mode
Recovery sequence may preclude making an accurate measurement of the Wake-up
message duration.
If the CPU is in HALT or OPERATIONAL mode, the LIN-UART (if enabled) times the
duration of the Wake-up and provides an interrupt following the end of the break sequence
if the duration is  3 bit times. The total duration of the Wake-up message in bit times may
be obtained by reading the
field in the Mode Select and Status register.
RxBreakLength
After a Wake-up message has been detected, the LIN-UART can be placed (by software)
either into LIN Master or LIN Slave Wait for Break states as appropriate. If the break
duration exceeds 15 bit times, the
field contains the value
. If the
RxBreakLength
Fh
LIN-UART is disabled, Wake-up message is detected via a port pin interrupt and timed by
software. If the device is in STOP mode, the High to Low transition on the port pin will
bring the device out of STOP mode.
The LIN Sleep state is selected by software setting
[1:0] = 00. The decision to
LinState
move from an active state to sleep state is based on the LIN messages as interpreted by
software.
PS025011-1010
P R E L I M I N A R Y
LIN-UART