R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 101

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SH7201 Group
This LSI has a clock pulse generator (CPG) that generates a CPU clock (Iφ), a peripheral clock
(Pφ), and a bus clock (Bφ). The CPG consists of a crystal oscillator, PLL circuits, and divider
circuits.
4.1
• Three clock operating modes
• Three clocks generated independently
• Frequency change function
• Power-down mode control
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
The mode is selected from among the three clock operating modes by the selection of the
following three conditions: the frequency-divisor in use, whether the PLLs are on or off, and
whether the internal crystal resonator or the input on the external clock-signal line is used.
A CPU clock (Iφ) for the CPU and cache; a peripheral clock (Pφ) for the on-chip peripheral
modules; a bus clock (Bφ = CKIO) for the external bus interface.
CPU and peripheral clock frequencies can be changed independently using the PLL (phase
locked loop) circuits and divider circuits within the CPG. Frequencies are changed by software
using frequency control register (FRQCR) settings.
The clock can be stopped by sleep mode, software standby mode, and deep standby mode.
Specific modules can also be stopped using the module standby function. For details on clock
control in the power-down modes, see section 25, Power-Down Modes.
Features
Section 4 Clock Pulse Generator (CPG)
Section 4 Clock Pulse Generator (CPG)
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