R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 244

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 9 Bus State Controller (BSC)
Notes: 1. Make sure the page read and page write cycle wait select (CSPRWAIT and
Page 216 of 1190
Bit
10 to 8
7 to 3
2 to 0
2. Writing to the CSn wait control register 1 (CS1WCNTn) must be done while CSC for the
CSPRWAIT
Bit Name
[2:0]
CSPWWAIT
[2:0]
CSPWWAIT) settings are within the range defined by the read and write cycle wait
select (CSRWAIT and CSWWAIT) settings. Select each wait cycle number according
the system configuration incorporated.
corresponding channel is disabled (EXENB = 0). Only channel 0 (CS0) can be enabled
by setting EXENB = 1. To enable channel 0, stop the DMAC and set EXENB to 1
between the reset release and data write access to CS0.
Initial
Value
111
All 0
111
R/W
R/W
R
R/W
Description
Page Read Cycle Wait Select
These bits specify the number of wait states inserted
into the second and subsequent page read cycles. This
setting is valid when the page read access enable bit
(PRENB) is set to 1.
000: 0 wait state
111: 7 wait states
Reserved
These bits are always read as 0. The write value
should always be 0.
Page Write Cycle Wait Select
These bits specify the number of wait states inserted
into the second and subsequent page write cycles.
This setting is valid when the page write access enable
bit (PWENB) is set to 1.
000: 0 wait state
111: 7 wait states
:
:
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010

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