R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 367

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SH7201 Group
Note: Bits 31 to 24 correspond to channels 0 to 7, respectively (31: channel 0, 30: channel
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
31 to 24 DASTS
23 to 0
1, …, 24: channel 7)
Bit Name
⎯
Initial
Value
All 0
All 0
R/W
R
R
Description
When read: DMA Arbitration Status
When written: DMA Arbitration Status Clear
These bits are used to verify the status of DMA
transfer on each channel.
•
•
•
Note:
When read:
0: Operand transfer not in progress
1: Operand transfer in progress
When written:
0: Invalid
1: Clears DMA arbitration status
Reserved
These bits are always read as 0. The write value
should always be 0.
Condition for setting to "1"
The bit for a channel in which operand transfer
(non-stop transfer) has started is set to "1".
Condition for clearing to "0"
These bits are cleared to "0" by either of the
following events.
⎯ Correct completion of single operand transfer
⎯ A "1" is written to the bit.
(non-stop transfer).
These bits are not cleared to "0" when DMAC
operation is forcibly ended by the external DMA
transfer forcible end signal. Write "1" to these
bits to clear them.
In DMA transfer to external devices, the DMA
arbitration status bit (DASTS) can be cleared
before the end of external bus access (once
the last data-write operation has started).
Section 11 Direct Memory Access Controller (DMAC)
Page 339 of 1190