R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 313

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SH7201 Group
The bus monitor is a module that monitors bus errors on each bus. When an illegal address access
or a bus timeout is detected, a bus error interrupt is generated and an access canceling signal is
output for the bus timeout. (The bus timeout function is used for debugging.)
Figure 10.1 shows a block diagram of the bus monitor.
10.1
The bus monitor has the following registers.
All registers are initialized by a power-on reset or in deep standby mode.
Table 10.1 Register Configuration
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Register Name
Bus monitor enable register
Bus monitor status register 1
Bus monitor status register 2
Bus error control register
Peripheral
bus
Register Descriptions
Bus monitor
Figure 10.1 Block Diagram of Bus Monitor
Section 10 Bus Monitor
Bus monitor status register 1
Bus monitor status register 2
Abbreviation
SYCBEEN
SYCBESTS1
SYCBESTS2
SYCBESW
Bus monitor enable register
Bus error control register
R/W
R/W
R/W
R/W
R/W
Initial Value
H'00
H'00
H'00
H'00
Bus error signal
Address
H'FF400000
H'FF400004
H'FF400008
H'FF40000C 8, 16, 32
Section 10 Bus Monitor
CPU core
SH2A
Page 285 of 1190
Access
Size
8, 16, 32
8, 16, 32
8, 16, 32

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