R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 1206

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Main Revisions for This Edition
Page 1178 of 1190
Item
28.2 Register Bits
28.3 Register States in Each
Operating Mode
29.3 AC Characteristics
Table 29.4 Maximum Operating
Frequency
Page
1079
1080
1081
1083
1086
1095
1106
1116
Revision (See Manual for Details)
Table amended
Table amended
Table amended
Table amended
Table amended
Table amended
Note added
Notes: 8. The ENB bit is initialized.
Table amended
Item
Operating
frequency
Register
Abbreviation
SCFCR_1
SCFCR_2
Register
Abbreviation
SCFCR_3
SCFCR_4
SCFCR_5
Register
Abbreviation
SCFCR_6
SCFCR_7
Register
Abbreviation
BCR1_0
Register
Abbreviation
BCR1_1
Register
Abbreviation
RSECAR
RMINAR
RHRAR
RWKAR
RDAYAR
RMONAR
RCR1
RCR2
RYRAR
RCR3
Bits 31/
23/15/7
TSG1_3
Bits 31/
23/15/7
TSG1_3
Bits 31/
23/15/7
RTRG1
RTRG1
Bits 31/
23/15/7
RTRG1
RTRG1
RTRG1
Bits 31/
23/15/7
RTRG1
RTRG1
CPU clock (Iφ)
Bus clock (Bφ)
Peripheral clock (Pφ)
Power-on
Reset
Retained*
Retained*
Retained*
Retained*
Retained*
Retained*
Initialized
Initialized
Retained
Initialized
Bits30/
22/14/6
TSG1_2
Bits30/
22/14/6
TSG1_2
Bits30/
22/14/6
RTRG0
RTRG0
Bits30/
22/14/6
RTRG0
RTRG0
RTRG0
Bits30/
22/14/6
RTRG0
RTRG0
8
8
8
8
8
8
Manual
Reset
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized*
Retained
Retained
Bits 29/
21/13/5
TSG1_1
SJW1
Bits 29/
21/13/5
TSG1_1
SJW1
Bits 29/
21/13/5
TTRG1
Bits 29/
21/13/5
TTRG1
Bits 29/
21/13/5
TTRG1
TTRG1
TTRG1
TTRG1
TTRG1
6
Software
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Symbol
f
Bits28/
20/12/4
TSG1_0
SJW0
Bits28/
20/12/4
TSG1_0
SJW0
Bits28/
20/12/4
TTRG0
TTRG0
Bits28/
20/12/4
TTRG0
TTRG0
TTRG0
Bits28/
20/12/4
TTRG0
TTRG0
Bits 27/
19/11/3
Bits 27/
19/11/3
Min.
20
20
5
Bits 27/
19/11/3
Bits 27/
19/11/3
Bits 27/
19/11/3
Deep
Standby
Retained*
Retained*
Retained*
Retained*
Retained*
Retained*
Initialized
Initialized
Retained
Initialized
R01UH0026EJ0300 Rev. 3.00
Typ.
⎯
⎯
⎯
8
8
8
8
8
8
Bits26/
18/10/2
TSG2_2
Bits26/
18/10/2
TSG2_2
Bits26/
18/10/2
RSTRG2
TFRST
RSTRG2
TFRST
Bits26/
18/10/2
RSTRG2
TFRST
RSTRG2
TFRST
RSTRG2
TFRST
Bits26/
18/10/2
RSTRG2
TFRST
RSTRG2
TFRST
Module
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Max.
120
100
60
40
Bits 25/
17/9/1
TSG2_1
Bits 25/
17/9/1
TSG2_1
Bits 25/
17/9/1
RSTRG1
RFRST
Bits 25/
17/9/1
RSTRG1
RFRST
RSTRG1
RFRST
RSTRG1
RFRST
Bits 25/
17/9/1
RSTRG1
RFRST
RSTRG1
RFRST
RSTRG1
RFRST
Unit
MHz
Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
SH7201 Group
Bits24/
16/8/0
TSG2_0
BSP
Bits24/
16/8/0
TSG2_0
BSP
Sep 24, 2010
Remarks
Regular
specifications
Wide-range
specifications
Bits24/
16/8/0
RSTRG0
LOOP
Bits24/
16/8/0
RSTRG0
LOOP
Bits24/
16/8/0
RSTRG0
LOOP
RSTRG0
LOOP
RSTRG0
LOOP
RSTRG0
LOOP
RSTRG0
LOOP
Module
RTC
Module
RCAN-ET
Module
RCAN-ET
Module
SCIF
Module
SCIF
Module
SCIF