R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 1048

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 26 User Debugging Interface (H-UDI)
26.2
Table 26.1 Pin Configuration
Note:
Page 1020 of 1190
Pin Name
H-UDI serial data
input/output clock pin
Mode select input pin
H-UDI reset input pin
H-UDI serial data
input pin
H-UDI serial data
output pin
ASE mode select pin
* The pin with the pull-up function.
Input/Output Pins
Symbol
UDTCK*
UDTMS*
UDTRST* Input
UDTDI*
UDTDO
ASEMD
I/O
Input
Input
Input
Output
Input
Function
Data is serially supplied to the H-UDI from the data
input pin (UDTDI), and output from the data output
pin (UDTDO), in synchronization with this clock. Fix
high when not used.
The state of the TAP control circuit is determined
by changing this signal in synchronization with
UDTCK. For the protocol, see figure 26.2. Fix high
when not used.
Input is accepted asynchronously with respect to
UDTCK, and when low, the H-UDI is reset.
UDTRST must be low for oscillation settling time
when power is turned on. See section 26.4.2,
Reset Types, for more information.
Data transfer to the H-UDI is executed by changing
this signal in synchronization with UDTCK. Fix high
when not used.
Data read from the H-UDI is executed by reading
this pin in synchronization with UDTCK. The initial
value of the data output timing is the UDTCK falling
edge. This can be changed to the UDTCK rising
edge by inputting the UDTDO change timing switch
command to SDIR. See section 26.4.3, UDTDO
Output Timing, for more information.
Fix high.
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010

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