R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 409

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SH7201 Group
Table 12.4 CCLR0 to CCLR2 (Channels 0, 3, and 4)
Notes: 1. Synchronous operation is set by setting the SYNC bit in TSYR to 1.
Table 12.5 CCLR0 to CCLR2 (Channels 1 and 2)
Notes: 1. Synchronous operation is selected by setting the SYNC bit in TSYR to 1.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Channel
0, 3, 4
Channel
1, 2
2. When TGRC or TGRD is used as a buffer register, TCNT is not cleared because the
2. Bit 7 is reserved in channels 1 and 2. It is always read as 0 and cannot be modified.
buffer register setting has priority, and compare match/input capture does not occur.
Bit 7
Reserved*
0
Bit 7
CCLR2
0
1
2
Bit 6
CCLR1
0
1
0
1
Bit 6
CCLR1
0
1
Bit 5
CCLR0
0
1
0
1
0
1
0
1
Bit 5
CCLR0
0
1
0
1
Description
TCNT clearing disabled
TCNT cleared by TGRA compare match/input
capture
TCNT cleared by TGRB compare match/input
capture
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
TCNT clearing disabled
TCNT cleared by TGRC compare match/input
capture*
TCNT cleared by TGRD compare match/input
capture*
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
Description
TCNT clearing disabled
TCNT cleared by TGRA compare match/input
capture
TCNT cleared by TGRB compare match/input
capture
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
2
2
1
1
1
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