R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 232

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 9 Bus State Controller (BSC)
Note:
9.3.2
In this LSI the data bus width of area 0 can be set to 8, 16, or 32 bits through external pins during
a power-on reset. The data bus widths of areas 1 to 6 can be modified through register settings
during program execution. Note that the selectable data bus widths may be limited depending on
the connected memory type.
After a power-on reset, the LSI starts execution of the program stored in the external memory
allocated in area 0.
For details on pin function settings, see section 23, Pin Function Controller (PFC).
Table 9.3
Page 204 of 1190
Internal Address
H'40000000 to H'4FFFFFFF
H'50000000 to H'E7FFFFFF
H'E8000000 to H'EFFFFFFF
H'F0000000 to H'FF3FFFFF
H'FF400000 to H'FFF7FFFF
H'FFF80000 to H'FFFBFFFF
H'FFFC0000 to H'FFFFFFFF
MD1
1
0
* For the on-chip RAM space, access the addresses shown in section 24, On-Chip RAM.
Data Bus Width and Pin Function Setting for Individual Areas
For the on-chip peripheral module space, access the addresses shown in section 28,
List of Registers. Do not access addresses which are not described in these sections.
Otherwise, correct operation cannot be guaranteed.
Correspondence between External Pin (MD1 and MD0) Settings and Data Bus
Width
MD0
1
0
1
0
Space
CS6
Other
Other
Other
Other
Other
Other
Data Bus Width
32 bits
16 bits
8 bits
Reserved (setting prohibited)
Memory to be Connected
Normal space
Reserved area*
On-chip peripheral modules, reserved
area*
Cache address array space, reserved
area*
On-chip peripheral modules, reserved
area*
On-chip RAM, reserved area*
On-chip peripheral modules, reserved
area*
R01UH0026EJ0300 Rev. 3.00
Cache
Cache-
disabled
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SH7201 Group
Sep 24, 2010