R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 474

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
12.3.26 Timer Cycle Buffer Register (TCBR)
TCBR is a 16-bit register used only in complementary PWM mode. It functions as a buffer
register for the TCDR register. The TCBR register values are transferred to the TCDR register
with the transfer timing set in the TMDR register.
The initial value of TCBR is H'FFFF.
12.3.27 Timer Interrupt Skipping Set Register (TITCR)
TITCR is an 8-bit readable/writable register that enables or disables interrupt skipping and
specifies the interrupt skipping count. The MTU2 has one TITCR.
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Bit
7
6 to 4
3
Initial value:
Note: Accessing the TCBR in 8-bit units is prohibited. Always access in 16-bit units.
R/W:
Bit:
Bit Name
T3AEN
3ACOR[2:0] 000
T4VEN
R/W
15
1
R/W
14
1
R/W
Initial value:
13
1
Initial
value
0
0
R/W
R/W:
12
1
Bit:
T3AEN
R/W
R/W
11
R/W
R/W
R/W
R/W
7
0
1
R/W
R/W
10
1
6
0
3ACOR[2:0]
Description
Enables or disables TGIA_3 interrupt skipping.
0: TGIA_3 interrupt skipping disabled
1: TGIA_3 interrupt skipping enabled
within the range from 0 to 7.*
For details, see table 12.40.
Enables or disables TCIV_4 interrupt skipping.
0: TCIV_4 interrupt skipping disabled
1: TCIV_4 interrupt skipping enabled
T3AEN
These bits specify the TGIA_3 interrupt skipping count
T4VEN
R/W
R/W
9
1
5
0
R/W
R/W
4
0
8
1
T4VEN
R/W
R/W
3
0
7
1
R/W
R/W
2
0
6
1
4VCOR[2:0]
R/W
R/W
5
1
1
0
R/W
R/W
0
0
4
1
R01UH0026EJ0300 Rev. 3.00
R/W
3
1
R/W
2
1
SH7201 Group
R/W
Sep 24, 2010
1
1
R/W
0
1