R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 655

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SH7201 Group
14.3
The WDT has the following registers.
Table 14.2 Register Configuration
Note:
14.3.1
WTCNT is an 8-bit readable/writable register that is incremented by cycles of the selected clock
signal. When an overflow occurs, it generates a watchdog timer overflow signal (WDTOVF) in
watchdog timer mode and an interrupt in interval timer mode. WTCNT is initialized to H'00 by a
power-on reset caused by the RES pin or in deep standby mode or software standby mode.
Use word access to write to WTCNT, writing H'5A in the upper byte. Use byte access to read
from WTCNT.
Note: The method for writing to WTCNT differs from that for other registers to prevent
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Register Name
Watchdog timer counter
Watchdog timer control/status
register
Watchdog reset control/status
register
* For the access size, see section 14.3.4, Notes on Register Access.
erroneous writes. See section 14.3.4, Notes on Register Access, for details.
Register Descriptions
Watchdog Timer Counter (WTCNT)
Initial value:
R/W:
Bit:
R/W
0
7
Abbreviation R/W
WTCNT
WTCSR
WRCSR
R/W
0
6
R/W
0
5
R/W
4
0
R/W
R/W
R/W
R/W
0
3
R/W
Initial
Value
H'00
H'18
H'1F
0
2
R/W
1
0
Section 14 Watchdog Timer (WDT)
R/W
Address
H'FFFE0002
H'FFFE0000
H'FFFE0004
0
0
Page 627 of 1190
Access
Size
16*
16*
16*

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