R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 279

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SH7201 Group
(6)
SDRAMC is provided with a sequencer for issuing the commands for SDRAM initialization. The
initialization sequence should always be initiated a single time only following a reset (all
channels) and following recovery from deep-power-down mode (individual channels). In such
cases operation cannot be guaranteed if the initialization sequence is not performed, or if it is
performed more than once.
The SDRAM initialization sequence issues the precharge-all-banks command followed by n (n = 1
to 15) auto-refresh commands, in that order. Make timing settings for the initialization sequencer
to SDRAM initialization register 0 (SDIR0). Initialization sequences are initiated using SDRAM
initialization register 1 (SDIR1).
Note that an initialization sequence for all channels is initiated using the DINIRQ bit.
Figure 9.10 shows a timing example for the initialization sequence. Setting DARFC to specify two
or more times causes multiple initialization auto-refresh cycles to be performed.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Initialization Sequencer
(DPC Bit Set Value: 001, DARFI Bit Set Value: 0001, DARFC Bit Set Value: 001)
CKIO
SDRAM command
Figure 9.10 Initialization Sequence Timing Example
DSL: Deselect command
RFA: Auto-refresh command
PRA: Precharge-all-banks command
Initialization precharge cycle
PRA
DSL
DPC
DSL
DSL
Initialization auto-refresh cycle
RFA
DSL
DARFI
Section 9 Bus State Controller (BSC)
DSL
DINST bit value
changes to 0
DSL
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