R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 329

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SH7201 Group
Figure 11.1 is a block diagram of the DMAC
11.2
Table 11.1 Pin Configuration
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Name
DREQm (m = 0 to 3)
DACKm (m = 0 to 3)
DACTm (m = 0 to 3)
DTENDm (m = 0 to 3)
on-chip peripheral circuit
DMA interrupt request
outside (DREQ) or
DMA request from
DMA acknowledge
interrupt request
DMA common
CPU control
Input/Output Pins
DMA active
DMA end
signal
[Legend]
DMA request transfer: Arbitration of DMA requests and generation of request signal to DMAC core
CPU I/F:
Memory I/F:
On-chip memory:
Work register:
DMAC control circuit: DMAC control circuit
Data buffer:
DMAC
Current
register
Reload
register
CPU
I/O
Input
Output
Output
Output
I/F
DMA request transfer
Figure 11.1 DMAC Block Diagram
Ch0 DMA transfer data
Chn DMA transfer data
Ch0 DMA setting data
Chn DMA setting data
On-chip memory
Function
External request for DMA transfer
DMA acknowledgement of external request for DMA transfer
(active low)
DMA active in externally requested DMA transfer (active low)
Completion of externally requested DMA transfer (active low)
Memory I/F
Read/write control of register access from CPU
Memory access control from CPU and DMAC core
Stores DMAC setting data and transfer data
Register the DMAC core refers to (access from CPU prohibited)
DMA data buffer
:
:
DMAC Core
Destination address
Memory load/store
Byte count register
Source address
(Work register)
Mode register
Section 11 Direct Memory Access Controller (DMAC)
register
register
control
buffer
Data
control
DMAC
circuit
Page 301 of 1190
DMAC
control signal

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