R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 324

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 10 Bus Monitor
10.2.3
The bus timeout detection function detects bus accesses whose cycles are extended to 768 cycles
or more.
(1)
Bus timeout errors occur in the following cases. This function should be used when debugging
software.
• A bus access is not completed on peripheral bus (1)
• The WAIT signal remains asserted during an external bus access
(2)
The operation when a bus timeout error occurs is explained below.
1. The timeout counter starts counting from the next cycle after the start of a bus access.
2. If the bus access is not completed in 768 cycles, a bus timeout occurs and an access canceling
3. The bus access is terminated.
4. The CPU processes the bus error.
Page 296 of 1190
signal is asserted for 256 cycles.
Bus signals such as address, data, BC, read/write, and burst are held.
The timeout error is recorded in the bus monitor status register 1 (SYCBESTS1) or bus
monitor status register 2 (SYCBESTS2).
A bus error interrupt is generated and sent to the CPU.
Locked buses are all released.
Conditions of Bus Timeout Error Generation
Operation When a Bus Timeout Error is Generated
Bus Timeout Detection Function
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010