R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 156

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 6 Interrupt Controller (INTC)
6.3.9
IBNR is a 16-bit register that enables or disables use of register banks and register bank overflow
exception. IBNR also indicates the bank number to which saving is performed next through the
bits BN3 to BN0.
IBNR is initialized to H'0000 by a power-on reset or in deep standby mode.
Page 128 of 1190
Bit
15, 14
13
12 to 4
Initial value:
R/W:
Bit:
Bank Number Register (IBNR)
R/W
Bit Name
BE[1:0]
BOVE
⎯
15
0
BE[1:0]
R/W
14
0
BOVE
R/W
13
0
Initial
Value
00
0
All 0
12
—
R
0
11
—
R
0
R/W
R/W
R
R/W
10
—
R
0
Description
Register Bank Enable
These bits enable or disable use of register banks.
00: Use of register banks is disabled for all interrupts.
01: Use of register banks is enabled for all interrupts
10: Reserved (setting prohibited)
11: Use of register banks is controlled by the setting of
Register Bank Overflow Enable
Enables of disables register bank overflow exception.
0: Generation of register bank overflow exception is
1: Generation of register bank overflow exception is
Reserved
These bits are always read as 0. The write value should
always be 0.
—
R
9
0
disabled
enabled
The setting of IBCR is ignored.
except NMI and user break. The setting of IBCR is
ignored.
IBCR.
—
R
8
0
—
R
7
0
—
R
6
0
—
R
5
0
—
R
4
0
R01UH0026EJ0300 Rev. 3.00
R
3
0
R
BN[3:0]*
2
0
SH7201 Group
Sep 24, 2010
R
1
0
R
0
0