R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 160

no-image

R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 6 Interrupt Controller (INTC)
6.3.13
DMA transfer request enable register 3 (DREQER3) is an 8-bit readable/writable register that
enables/disables the ADC, MTU2 (channels 0 to 4), and RCAN-ET (channels 0 and 1) DMA
transfer requests, and enables/disables CPU interrupt requests.
DMA transfer request enable register 3 is initialized by a power-on reset or in deep standby mode.
Page 132 of 1190
Bit
7
6
5
4
3
2
1
0
Bit Name
ADC
MTU2 4ch
MTU2 3ch
MTU2 2ch
MTU2 1ch
MTU2 0ch
RCAN-ET 1ch 0
RCAN-ET 0ch 0
DMA Transfer Request Enable Register 3 (DREQER3)
Initial value:
Initial
Value
0
0
0
0
0
0
R/W:
Bit:
ADC
R/W
0
7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MTU2
R/W
4ch
0
6
Description
DMA Transfer Request Enable Bits
These bits enable/disable DMA transfer requests, and
enable/disable CPU interrupt requests.
0: DMA transfer request disabled, CPU interrupt
1: DMA transfer request enabled, CPU interrupt request
MTU2
R/W
3ch
0
5
request enabled
disabled
MTU2
R/W
2ch
0
4
MTU2
R/W
1ch
0
3
MTU2
R/W
0ch
0
2
RCAN-ET
R/W
1ch
1
0
RCAN-ET
R/W
0ch
0
0
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010

Related parts for R0K572011S000BE