R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 457

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SH7201 Group
12.3.15 Timer Synchronous Register (TSYR)
TSYR is an 8-bit readable/writable register that selects independent operation or synchronous
operation for the channel 0 to 4 TCNT counters. A channel performs synchronous operation when
the corresponding bit in TSYR is set to 1.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
7
6
5 to 3
Bit Name
SYNC4
SYNC3
Initial value:
Initial
Value
0
0
All 0
R/W:
Bit:
SYNC4 SYNC3
R/W
R/W
R/W
R/W
R
7
0
R/W
6
0
Description
Timer Synchronous operation 4 and 3
These bits are used to select whether operation is
independent of or synchronized with other channels.
When synchronous operation is selected, the TCNT
synchronous presetting of multiple channels, and
synchronous clearing by counter clearing on another
channel, are possible.
To set synchronous operation, the SYNC bits for at
least two channels must be set to 1. To set
synchronous clearing, in addition to the SYNC bit, the
TCNT clearing source must also be set by means of
bits CCLR0 to CCLR2 in TCR.
0: TCNT_4 and TCNT_3 operate independently (TCNT
1: TCNT_4 and TCNT_3 performs synchronous
Reserved
These bits are always read as 0. The write value should
always be 0.
R
5
0
presetting/clearing is unrelated to other channels)
operation
TCNT synchronous presetting/synchronous clearing
is possible
R
4
0
R
3
0
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
SYNC2 SYNC1 SYNC0
R/W
2
0
R/W
1
0
R/W
0
0
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