SC1200UFH-266 AMD (ADVANCED MICRO DEVICES), SC1200UFH-266 Datasheet - Page 199

• Manufacturer Part Number: SC1200UFH-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UFH-266

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0
AMD Geode™ SC1200/SC1201 Processor Data Book
Index 5Ch
Indicates target interrupts for signals INTB# and INTA#.
Note:
Index 5Dh
Indicates target interrupts for signals INTD# and INTC#. Note that INTD# is muxed with IDE_DATA7 (selection made via PMR[24]) and
INTC# is muxed with GPIO19+IOCHRDY (selection made via PMR[9,4]). See Table 4-2 on page 72 for PMR bit descriptions.
Note:
Index 5Eh-5Fh
Table 6-29. F0: PCI Header/Bridge Configuration Registers for GPIO and LPC Support (Continued)
Bit
7:4
3:0
7:4
3:0
4
3
2
1
0
The target interrupt must first be configured as level sensitive via I/O Ports 4D0h and 4D1h in order to maintain PCI interrupt
compatibility.
The target interrupt must first be configured as level sensitive via I/O Ports 4D0h and 4D1h in order to maintain PCI interrupt
compatibility.
Description
Secondary IDE Controller Positive Decode. Selects PCI positive or subtractive decoding for accesses to I/O ports 170h-
177h and 376h-377h (excluding writes to 377h).
0: Subtractive. Subtractively decoded IDE addresses are forwarded to the PCI slot bus. If a master abort occurs, they are
1: Positive. Positively decoded IDE addresses are forwarded to the internal IDE controller and then to the IDE bus.
Primary IDE Controller Positive Decode. Selects PCI positive or subtractive decoding for accesses to I/O ports 1F0h-
1F7h and 3F6h-3F7h (excluding writes to 3F7h).
0: Subtractive. Subtractively decoded IDE addresses are forwarded to the PCI slot bus. If a master abort occurs, they are
1: Positive. Positively decoded IDE addresses are forwarded to the internal IDE controller and then to the IDE bus.
LPT3 Positive Decode. Selects PCI positive or subtractive decoding for accesses to I/O ports 278h-27Fh.
0: Subtractive.
1: Positive.
LPT2 Positive Decode. Selects PCI positive or subtractive decoding for accesses to I/O ports 378h-37Fh.
0: Subtractive.
1: Positive.
LPT1 Positive Decode. Selects PCI positive or subtractive decoding for accesses to I/O ports 3BCh-3BFh
0: Subtractive.
1: Positive.
INTB# (Ball C26) Target Interrupt.
0000: Disable
0001: IRQ1
0010: Reserved
0011: IRQ3
INTA# (Ball D26) Target Interrupt.
0000: Disable
0001: IRQ1
0010: Reserved
0011: IRQ3
INTD# (Ball AA2) Target Interrupt.
0000: Disable
0001: IRQ1
0010: Reserved
0011: IRQ3
INTC# (Ball C9) Target Interrupt.
0000: Disable
0001: IRQ1
0010: Reserved
0011: IRQ3
then forwarded to ISA.
then forwarded to ISA.
0100: IRQ4
0101: IRQ5
0110: IRQ6
0111: IRQ7
0100: IRQ4
0101: IRQ5
0110: IRQ6
0111: IRQ7
0100: IRQ4
0101: IRQ5
0110: IRQ6
0111: IRQ7
0100: IRQ4
0101: IRQ5
0110: IRQ6
0111: IRQ7
PCI Interrupt Steering Register 1 (R/W)
PCI Interrupt Steering Register 2 (R/W)
Reserved
1000: Reserved
1001: IRQ9
1010: IRQ10
1011: IRQ11
1000: Reserved
1001: IRQ9
1010: IRQ10
1011: IRQ11
1000: Reserved
1001: IRQ9
1010: IRQ10
1011: IRQ11
1000: Reserved
1001: IRQ9
1010: IRQ10
1011: IRQ11
32579B
1100: IRQ12
1101: Reserved
1110: IRQ14
1111: IRQ15
1100: IRQ12
1101: Reserved
1110: IRQ14
1111: IRQ15
1100: IRQ12
1101: Reserved
1110: IRQ14
1111: IRQ15
1100: IRQ12
1101: Reserved
1110: IRQ14
1111: IRQ15
Reset Value: 00h
Reset Value: 00h
Reset Value: 00h
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