SC1200UFH-266 AMD (ADVANCED MICRO DEVICES), SC1200UFH-266 Datasheet - Page 71

• Manufacturer Part Number: SC1200UFH-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UFH-266

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

General Configuration Block
The General Configuration block includes registers for:
• Pin Multiplexing and Miscellaneous Configuration
• WATCHDOG Timer
• High-Resolution Timer
• Clock Generators
A selectable interrupt is shared by all these functions.
4.1
Registers of the General Configuration block are I/O
mapped in a 64-byte address range. These registers are
physically connected to the internal Fast-PCI bus, but do
AMD Geode™ SC1200/SC1201 Processor Data Book
00h-01h
02h-03h
04h
05h-07h
08h-0Bh
0Ch
0Dh
0Eh-0Fh
10h
11h
12h
13h-17h
18h-1Bh
1Ch-1Dh
1Eh-1Fh
20h-2Fh
30h-33h
34h-37h
38h
39h-3Bh
3Ch
3Dh
3Eh-3Fh
Offset
Configuration Block Addresses
Width
(Bits)
16
16
32
32
16
32
32
16
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8
8
8
8
8
8
8
8
Table 4-1. General Configuration Block Register Summary
R/WC
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
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Name
WDTO. WATCHDOG Timeout
WDCNFG. WATCHDOG Configuration
WDSTS. WATCHDOG Status
RSVD. Reserved
TMVALUE. TIMER Value
TMSTS. TIMER Status
TMCNFG. TIMER Configuration
RSVD. Reserved
MCCM. Maximum Core Clock Multiplier
RSVD. Reserved
PPCR. PLL Power Control
RSVD. Reserved
PLL3C. PLL3 Configuration
RSVD. Reserved
CCFC. Core Clock Frequency Control
RSVD. Reserved
PMR. Pin Multiplexing Register
MCR. Miscellaneous Configuration Register
INTSEL. Interrupt Selection
RSVD. Reserved
ID. Device ID
REV. Revision
CBA. Configuration Base Address
4.0General Configuration Block
not have a register block in PCI configuration space (i.e.,
they do not appear to software as PCI registers).
After system reset, the Base Address register is located at
I/O address 02EAh. This address can be used only once.
Before accessing any PCI registers, the BOOT code must
program this 16-bit register to the I/O base address for the
General Configuration block registers. All subsequent
writes to this address, are ignored until system reset.
Note: Location of the General Configuration Block cannot
Reserved bits in the General Configuration block should be
read as written unless otherwise specified.
be determined by software. See the AMD Geode™
SC1200/SC1201 Processor Specification Update
document.
Strapped Value
Strapped Value
Reset Value
E1040005h
00000000h
00000001h
32579B
xxxxxxxxh
0000h
0000h
xxxxh
00h
00h
00h
2Fh
00h
xxh
xxh
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4
Reference
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