SC1200UFH-266 AMD (ADVANCED MICRO DEVICES), SC1200UFH-266 Datasheet - Page 333

• Manufacturer Part Number: SC1200UFH-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UFH-266

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

Video Processor Module - Register Summary
7.3
The register space for accessing and configuring the Video
Processor is located in the Core Logic Chipset Register
Space (F0-F5). The Chipset Register Space is accessed
via the PCI interface using the PCI Type One Configuration
Mechanism (see Section 6.3.1 "PCI Configuration Space
and Access Methods" on page 175).
AMD Geode™ SC1200/SC1201 Processor Data Book
00h-01h
02h-03h
04h-05h
06h-07h
08h
09h-0Bh
0Ch
0Dh
0Eh
0Fh
10h-13h
14h-17h
18h-1Bh
1Ch-2Bh
2Ch-2Dh
2Eh-2Fh
30h-3Bh
3Ch
3Dh
3Eh-FFh
00h-03h
04h-07h
08h-0Bh
0Ch-0Fh
10h-13h
14h-17h
18h-1Bh
1Ch-1Fh
20h-23h
24h-27h
F4 Index
F4BAR0+
Memory
Offset
Register Descriptions
Width
(Bits)
16
16
16
16
24
32
32
32
16
16
---
8
8
8
8
8
--
--
8
8
Table 7-5. F4: PCI Header Registers for Video Processor Support Summary
Width
(Bits)
32
32
32
32
32
32
32
32
32
32
Table 7-6. F4BAR0: Video Processor Configuration Registers Summary
Type
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
---
--
--
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
Name
Vendor Identification Register
Device Identification Register
PCI Command Register
PCI Status Register
Device Revision ID Register
PCI Class Code Register
PCI Cache Line Size Register
PCI Latency Timer Register
PCI Header Type Register
PCI BIST Register
Base Address Register 0 (F4BAR0). Sets the base address for the
memory-mapped Video Configuration Registers within the Video
Processor. Refer to Table 7-9 on page 338 for programming infor-
mation regarding the register offsets accessed through this regis-
ter.
Base Address Register 1 (F4BAR1). Reserved.
Base Address Register 2 (F4BAR2). Sets the base address for the
memory-mapped VIP (Video Interface Port) Registers (summa-
rized in Table 7-10 on page 359).
Reserved
Subsystem Vendor ID
Subsystem ID
Reserved
Interrupt Line Register
Interrupt Pin Register
Reserved
Name
Video Configuration Register
Display Configuration Register
Video X Position Register
Video Color Mask Register
Video Y Position Register
Video Upscaler Register
Video Color Key Register
Palette Address Register
Palette Data Register
Reserved
7.3.1
The tables in this subsection summarize the registers of
the Video Processor. Included in the tables are the regis-
ter’s reset values and page references where the bit for-
mats are found.
Register Summary
32579B
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
x0000000h
xxxxxxxxh
xxxxxxxxh
030000h
100Bh
100Bh
0504h
0000h
0280h
0504h
Reset
Value
Reset
Value
01h
00h
00h
00h
00h
00h
00h
00h
03h
00h
---
(Table 7-8)
(Table 7-9)
Reference
Reference
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