SC1200UFH-266 AMD (ADVANCED MICRO DEVICES), SC1200UFH-266 Datasheet - Page 272

• Manufacturer Part Number: SC1200UFH-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UFH-266

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

272
Offset 28h
Audio Bus Master 1: Input from codec; 32-Bit; Left and Right Channels; Slots 3 and 4.
Offset 29h
Audio Bus Master 1: Input from codec; 32-Bit; Left and Right Channels; Slots 3 and 4.
Offset 2Ah-2Bh
Offset 2Ch-2Fh
Audio Bus Master 1: Input from codec; 32-Bit; Left and Right Channels; Slots 3 and 4.
Note:
31:2
Bit
7:4
2:1
7:2
1:0
3
0
1
0
The Physical Region Descriptor (PRD) table consists of one or more entries - each describing a memory region to or from
which data is to be transferred. Each entry consists of two DWORDs.
Description
Reserved. Must be set to 0. Must return 0 on reads.
Read or Write Control. Set the transfer direction of Audio Bus Master 1.
0: PCI reads are performed.
1: PCI writes are performed.
This bit must be set to 1 (write) and should not be changed when the bus master is active.
Reserved. Must be set to 0. Must return 0 on reads.
Bus Master Control. Controls the state of the Audio Bus Master 1.
0: Disable.
1: Enable.
Setting this bit to 1 enables the bus master to begin data transfers. When writing this bit to 0, the bus master must be either
paused or reached EOT. Writing this bit to 0 while the bus master is operating results in unpredictable behavior (and may
cause a crash of the bus master state machine). The only recovery from this condition is a PCI reset.
Reserved.
Bus Master Error. Indicates if hardware encountered a second EOP before software has cleared the first.
0: No.
1: Yes.
If hardware encounters a second EOP (end of page) before software has cleared the first, it causes the bus master to pause
until this register is read to clear the error.
End of Page. Indicates if the bus master transferred data which is marked by EOP bit in the PRD table (bit 30).
0: No.
1: Yes.
Pointer to the Physical Region Descriptor Table. This bit field is a PRD table pointer for Audio Bus Master 1.
When written, this register points to the first entry in a PRD table. Once Audio Bus Master 1 is enabled (Command Register
bit 0 = 1), it loads the pointer and updates this register (by adding 08h) so that it points to the next PRD.
When read, this register points to the next PRD.
Reserved. Must be set to 0.
Table 6-38. F3BAR0+Memory Offset: Audio Configuration Registers (Continued)
DWORD 0:
DWORD 1:
32579B
[31:0]
31
30
29
[28:16]
[15:0]
Audio Bus Master 1 Command Register (R/W)
Audio Bus Master 1 PRD Table Address (R/W)
Audio Bus Master 1 SMI Status Register (RC)
= Memory Region Physical Base Address
= End of Table Flag
= End of Page Flag
= Loop Flag (JMP)
= Reserved (0)
= Byte Count of the Region (Size)
Not Used
AMD Geode™ SC1200/SC1201 Processor Data Book
Core Logic Module - Audio Registers - Function 3
Reset Value: 00000000h
Reset Value: 00h
Reset Value: 00h