ST52F513G3M6 STMicroelectronics, ST52F513G3M6 Datasheet - Page 104

ST52F513G3M6

Manufacturer Part Number
ST52F513G3M6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST52F513G3M6

Cpu Family
ST52
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Program Memory Type
Flash
Program Memory Size
8KB
Total Internal Ram Size
256Byte
# I/os (max)
22
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
SO
Lead Free Status / Rohs Status
Compliant

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ST52510xx ST52513xx
Figure 15.6 Single Master Configuration
15.4.8 Interrupts
Note: The SPI interrupt events are connected to
the same interrupt vector (see Interrupts chapter).
They generate an interrupt if the corresponding
Enable Control Bit (SPIE) and the interrupt mask
bit (MSKSPI) in the INT_MASK Configuration
Register is set.
104/136
SPI End of Transfer Event
Master Mode Fault Event
5V
MOSI
SCK
SS
SCK
MOSI
Master
MCU
MCU
Slave
MISO
MISO
SS
Interrupt Event
MOSI
SCK
Slave
MCU
MISO
SS
MOSI
SCK
Slave
MCU
MODF
Event
SPIF
Flag
MISO
SS
Control
Enable
SPIE
Bit
MOSI
SCK
from
Wait
MCU
Slave
Exit
Yes
Yes
MISO
SS
from
Exit
Halt
No
No

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