ST52F513G3M6 STMicroelectronics, ST52F513G3M6 Datasheet - Page 20

ST52F513G3M6

Manufacturer Part Number
ST52F513G3M6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST52F513G3M6

Cpu Family
ST52
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Program Memory Type
Flash
Program Memory Size
8KB
Total Internal Ram Size
256Byte
# I/os (max)
22
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
SO
Lead Free Status / Rohs Status
Compliant

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ST52510xx ST52513xx
Figure 2.2 Data Processing Unit (DPU)
The DPU receives, stores and sends the
instructions deriving from the Program/Data
Memory, Register File or from the peripherals. It is
controlled by the CU on the basis of the decoded
instruction. The Fuzzy registers store the partial
results of the fuzzy computation. The accumulator
register is used by the ALU and is not accessible
directly: the instructions used by the ALU can
address all the Register File locations as
operands, allowing a more compact code and a
faster execution.
The following addressing modes are available:
inherent, immediate, direct, indirect, bit direct.
2.1.1 Program Counter.
The Program Counter (PC) is a 16-bit register that
contains the address of the next memory location
to be processed by the core. This memory location
may be both an instruction or data address.
The Program Counter’s 16-bit length allows the
direct addressing of a maximum of 64 Kbytes in the
Program/Data Memory space.
20/136
Program Memory
Input Registers
Peripherals
Interrupts Unit
REGISTER FILE
ADDRESS
REGISTER
256 Bytes
FLAGS REG.
FILE
PROGRAM COUNTER
ACCUMULATOR
The PC can be changed in the following ways:
2.1.2 Flags.
The ST FIVE core includes different sets of flags
that correspond to 2 different modes: normal mode
and interrupt mode. Each set of flags consist of a
CARRY flag (C), ZERO flag (Z) and SIGN flag (S).
Each set is stacked: one set of flags is used during
normal operation and other sets are used during
each level of interrupt. Formally, the user has to
manage only one set of flags: C, Z and S since the
flag stack operation is performed automatically.
JP (Jump)
Interrupt
RETI
RET
CALL
Reset
Normal Instruction
PROCESSOR
REGISTERS
DECISION
ALU
Memory Address
Control Unit
Peripherals
PC = Interrupt Vector
PC = Subroutines address
PC = Pop (stack)
PC = Pop (stack)
PC = Jump Address
PC = Reset Vector
PC = PC + instr. length

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