ST52F513G3M6 STMicroelectronics, ST52F513G3M6 Datasheet - Page 44

• Manufacturer Part Number: ST52F513G3M6
• Manufacturer: STMicroelectronics

Specifications of ST52F513G3M6

• Cpu Family: ST52
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: I2C/SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 22
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: SO
• Lead Free Status / Rohs Status: Compliant

ST52510xx ST52513xx
5.6 Register Description
Interrupt Mask Register (INT_MASK)
Configuration Register 0 (00h) Read/Write
Reset Value: 0000 0000 (00h)
Bit 7: MSKPB Interrupt Mask Port B
Bit 6: MSKPA Interrupt Mask Port A
Bit 5: MSKI2C Interrupt Mask I
Bit 4: MSKSPI Interrupt Mask SPI
Bit 3: MSKSCI Interrupt Mask SCI
Bit 2: MSKT1 Interrupt Mask PWM/Timer 1
Bit 1: MSKT0 Interrupt Mask Pwm/Timer 0
Bit 0: MSKAD Interrupt Mask A/D Converter
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MSKPB MSKPA MSKI2C MSKSPI MSKSCI MSKT1
7
0: Port B interrupt masked
1: Port B interrupt enabled
0: Port A interrupt masked
1: Port A interrupt enabled
0: I
1: I
0: SPI interrupt masked
1: SPI interrupt enabled
0: SCI interrupt masked
1: SCI interrupt enabled
0: Pwm/Timer 1 interrupt masked
1: Pwm/Timer 1 interrupt enabled
0: Pwm/Timer 0 interrupt masked
1: Pwm/Timer 0 interrupt enabled
0: A/D interrupt masked
1: A/D interrupt enabled
2
2
C Interface interrupt masked
C Interface interrupt enabled
2
C Interface
MSKT0 MSKAD
0
Interrupt Polarity Register (INT_POL)
Configuration Register 1 (01h) Read/Write
Reset Value: 0000 0000 (00h)
Bit 7-5: Not Used
Bit 4-3: See Timer 0 Registers Description
Bit 2: POLPB Port B Interrupt Polarity
Bit 1: POLPA Port A Interrupt Polarity
Bit 0: POLNMI Non Maskable Interrupt Polarity
Low Priority Register (INT_PRL_L)
Configuration Register 2 (02h) Read/Write
Reset Value: 1111 1010 (FAh)
Medium Priority Register (INT_PRL_M)
Configuration Register 3 (03h) Read/Write
Reset Value: 1100 0110 (C6h)
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7
7
7
-
0: The Port B interrupt is triggered on the
1: The Port B interrupt is triggered on the
0: The Port A interrupt is triggered on the
1: The Port A interrupt is triggered on the
0: The NMI is triggered on the rising edge of
1: The NMI is triggered on the falling edge of
PRL22
PRL14
rising edge of the applied external signal.
falling edge of the applied external signal.
rising edge of the applied external signal.
falling edge of the applied external signal.
the applied external signal.
the applied external signal.
-
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PRL13
-
RESPOL STRPOL POLPB
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PRL12
PRL19
PRL11
PRL18
PRL10
POLPA POLNMI
PRL17
PRL9
PRL16
PRL8
0
0
0