ST52F513G3M6 STMicroelectronics, ST52F513G3M6 Datasheet - Page 41

ST52F513G3M6

Manufacturer Part Number
ST52F513G3M6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST52F513G3M6

Cpu Family
ST52
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Program Memory Type
Flash
Program Memory Size
8KB
Total Internal Ram Size
256Byte
# I/os (max)
22
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
SO
Lead Free Status / Rohs Status
Compliant

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4.8.4 Option Bytes.
First Protected Page (PG_LOCK)
Option Byte 5 (05h)
Bit 7-0: LCK7-0 First Page write protected
In this register the address of first page to be
protected in writing is specified. The pages
following this one are protected up to the page
specified by the PG_UNLOCK Option Byte (not
included among the protected ones).
First Page not Protected (PG_UNLOCK)
Option Byte 6 (06h)
Bit 7-0: UNLCK7-0 First Page not write protected
In this register the address of first page not write
protected after the protected ones is specified. The
pages following this one aren’t protected.
UNLCK7 UNLCK6 UNLCK5 UNLCK4 UNLCK3 UNLCK2 UNLCK1 UNLCK0
LCK7
7
7
LCK6
LCK5
LCK4
LCK3
LCK2
LCK1
LCK0
0
0
4.8.5 Input Register.
IAP Status Register (IAP_SR)
Input Register 40 (028h) Read only
Reset Value: 0000 0000 (00h)
Bit 7-2: Not Used
Bit 1: PRTCD Page Protected
Bit 0: ABRT Writing operation aborted
The ABRT and PRTCD bits are reset after the next
successful data writing in the Flash of EEPROM
memory.
7
-
0: The writing has been completed
1: The writing has been aborted because the
0: The writing has been completed
1: The writing has been aborted because an
page is protected.
interrupt or another unspecified cause
occurred.
-
-
-
ST52510xx ST52513xx
-
-
PRTCD
41/136
ABRT
0

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