ST52F513G3M6 STMicroelectronics, ST52F513G3M6 Datasheet - Page 77

ST52F513G3M6

Manufacturer Part Number
ST52F513G3M6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST52F513G3M6

Cpu Family
ST52
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Program Memory Type
Flash
Program Memory Size
8KB
Total Internal Ram Size
256Byte
# I/os (max)
22
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
SO
Lead Free Status / Rohs Status
Compliant

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PWM/Timer 0 Control Register 2 (PWM0_CR2)
Configuration Register 10 (0Ah) Read/Write
Reset Value: 0000 0000 (00h)
Bit 7-6: Not Used
Bit 5: T0WAV T0OUT Waveform
Bit 4-0: T0PRESC PWM/Timer 0 Prescaler
PWM/Timer 0 Control Register 3 (PWM0_CR3)
Configuration Register 11 (0Bh) Read/Write
Reset Value: 0000 0000 (00h)
Bit 7: T1SYNC PWM/Timer 1 Set/Reset mask
Bit 6: not used
Bit 5: T0SYNC PWM/Timer 0 Set/Reset mask
Bit 4: T0CKS PWM/Timer 0 Clock Source
Bit 3-2: STRSRC PWM/Timer 0 Start signal source
T1SYNC
7
7
-
0: pulse (type2)
1: square (type1)
0: Set/Reset activated
1: Set/Reset masked
0: Set/Reset activated
1: Set/Reset masked
0: Internal clock
1: External Clock from TCLK
The PWM/Timer 0 clock is divided by a
factor equal to 2
value allowed for T0PRESC is 10000
(010h).
00: Internal from T0STRT bit
01: External from TSTRT pin
10: Both internal and external
-
-
T0SYNC T0CKS
T0WAV
4
4
T0PRESC
STRSRC
T0PRESC
. The maximum
2
RESSRC
0
0
Bit 1-0: RESSRC PWM/Timer 0 Reset source
Interrupt Polarity Register (INT_POL)
Configuration Register 1 (01h) Read/Write
Reset Value: 0000 0000 (00h)
Bit 7-5: Not Used
Bit 4: RESPOL Reset signal polarity
Bit 3: STRPOL Start signal polarity
Bit 2-0: See Interrupt Registers Description
12.5.2 PWM/Timer 0 Input Registers.
PWM/Timer 0 Counter High Input Register
(PWM0_COUNT_IN_H)
Input Register 21 (015h) Read only
Reset Value: 0000 0000 (00h)
Bit 7-0: T0CI15-8 PWM/Timer 0 Counter MSB
In this register the current value of the Timer 0
Counter MSB can be read.
Warning: Both of the PWMx_COUNT_IN_x
registers must be always read. To avoid side
effects, the values stored inside these registers are
frozen, and new updates cannot be stored, until
both the values are read.
T0CI15
7
7
-
0: Set/Reset on low level/rising edge
1: Set/Reset on high level/falling edge
0: Start on high level/rising edge
1: Start on low level/falling edge
T0CI14
00: Internal from T0RES bit
01: External from TRES pin
10: Both internal and external
-
T0CI13
-
RESPOL STRPOL POLPB
T0CI12
ST52510xx ST52513xx
T0CI11
T0CI10
POLPA POLNMI
T0CI9
77/136
T0CI8
0
0

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