LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1103

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

28.3.2.9.1
The general guideline is that P-Flash protection can only be added and not removed.
all valid transitions between P-Flash protection scenarios. Any attempt to write an invalid scenario to the
FPROT register will be ignored. The contents of the FPROT register reflect the active protection scenario.
See the FPHS and FPLS bit descriptions for additional restrictions.
28.3.2.10 EEE Protection Register (EPROT)
The EPROT register defines which buffer RAM EEE partition areas are protected against writes.
All bits in the EPROT register are readable and writable except for RNV[6:4] which are only readable. The
EPOPEN and EPDIS bits can only be written to the protected state. The EPS bits can be written anytime
until the EPDIS bit is cleared. If the EPOPEN bit is cleared, the state of the EPDIS and EPS bits is
irrelevant.
During the reset sequence, the EPROT register is loaded from the EEE protection byte in the Flash
configuration field at global address 0x7F_FF0D located in P-Flash memory (see
by reset condition F in
sequence, the P-Flash sector containing the EEE protection byte must be unprotected, then the EEE
protection byte must be programmed. If a double bit fault is detected while reading the P-Flash phrase
Freescale Semiconductor
Offset Module Base + 0x0009
Reset
W
R
EPOPEN
F
7
P-Flash Protection Restrictions
1. Allowed transitions marked with X, see
Protection
Scenario
From
= Unimplemented or Reserved
0
1
2
3
4
5
6
7
Figure
F
6
Table 28-23. P-Flash Protection Scenario Transitions
Figure 28-15. EEE Protection Register (EPROT)
28-15. To change the EEE protection that will be loaded during the reset
MC9S12XE-Family Reference Manual , Rev. 1.23
X
X
0
RNV[6:4]
F
5
X
X
X
X
1
X
X
X
X
2
To Protection Scenario
F
4
Figure 28-14
X
X
X
X
X
X
X
X
3
EPDIS
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
X
X
X
X
4
for a definition of the scenarios.
F
3
(1)
5
X
X
F
2
X
X
6
Table
Table 28-23
EPS[2:0]
X
7
F
1
28-3) as indicated
specifies
F
0
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