LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1289

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0x0114–0x011F Memory Protection Unit (MPU) Map
1
0x0120–0x012F Interrupt Module (S12XINT) Map
Freescale Semiconductor
Address
Address
0x011C
0x011D
0x0114
0x0115
0x0116
0x0117
0x0118
0x0119
0x011A
0x011B
0x011E
0x011F
0x0120
0x0121
0x0122
0x0123
0x0124
0x0125
0x0126
0x0127
The module addresses 0x03C6−0x03CB represent a window in the register map through which different descriptor registers
are visible.
INT_CFADDR
MPUDESC0
MPUDESC1
MPUDESC2
MPUDESC3
MPUDESC4
MPUDESC5
INT_XGPRIO
MPUASTAT0
MPUASTAT1
MPUASTAT2
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
MPUFLG
MPUSEL
Name
Name
IVBR
1
1
1
1
1
1
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
SVSEN
MSTR0
Bit 7
Bit 7
AEF
WP
0
0
0
0
0
0
0
0
MC9S12XE-Family Reference Manual Rev. 1.23
MSTR1
INT_CFADDR[7:4]
Bit 6
WPF
Bit 6
NEX
0
0
0
0
0
0
0
0
MSTR2
NEXF
Bit 5
Bit 5
0
0
0
0
0
0
0
0
0
HIGH_ADDR[18:11]
MSTR3
LOW_ADDR[18:11]
HIGH_ADDR[10:3]
LOW_ADDR[10:3]
Bit 4
Bit 4
IVB_ADDR[7:0]
0
0
0
0
0
0
0
0
0
0
ADDR[15:8]
ADDR[7:0]
ADDR[22:16]
Bit 3
Bit 3
0
0
0
0
0
0
0
0
0
0
Appendix E Detailed Register Address Map
HIGH_ADDR[22:19]
LOW_ADDR[22:19]
Bit 2
Bit 2
0
0
0
0
0
0
0
0
XILVL[2:0]
SEL[2:0]
Bit 1
Bit 1
0
0
0
0
0
0
0
0
SVSF
Bit 0
Bit 0
0
0
0
0
0
0
0
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