HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 132
HD6433044
Manufacturer Part Number
HD6433044
Description
(HD64 Series) Hitachi Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6433044.pdf
(867 pages)
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6.2.5 Bus Release Control Register (BRCR)
BRCR is an 8-bit readable/writable register that enables address output on bus lines A
and enables or disables release of the bus to an external device.
BRCR is initialized to H'FE by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—Address 23 Enable (A23E): Enables PA
Writing 0 in this bit enables A
cannot be modified and PA
Bit 7
A23E
0
1
Bit 6—Address 22 Enable (A22E): Enables PA
Writing 0 in this bit enables A
cannot be modified and PA
Bit 6
A22E
0
1
Bit
Initial value
Read/
Write
Mode 1, 2, 5, 7
Mode 3, 4, 6
Description
PA
PA
Description
PA
PA
4
4
5
5
is the A
is the PA
is the A
is the PA
A23E
Address 23 to 21 enable
These bits enable PA to
PA to be used for A
A
R/W
23
22
—
21
7
1
4
5
4
/TP
/TP
address output
address output pin
address output pin
4
5
4
5
has its ordinary input/output functions.
/TIOCA
has its ordinary input/output functions.
/TIOCB
23
22
A22E
R/W
—
6
1
address output from PA
address output from PA
1
1
input/output pin
input/output pin
A21E
R/W
23
—
6
5
1
to
118
4
5
to be used as the A
to be used as the A
—
—
—
Reserved bits
4
1
4
5
. In modes other than 3, 4, and 6 this bit
. In modes other than 3, 4, and 6 this bit
—
—
—
3
1
23
22
—
—
—
address output pin.
address output pin.
2
1
Bus release enable
Enables or disables
release of the bus to
an external device
—
—
—
1
1
(Initial value)
(Initial value)
23
to A
BRLE
R/W
R/W
0
0
21
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