HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 133

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HD6433044

Manufacturer Part Number
HD6433044
Description
(HD64 Series) Hitachi Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet

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Bit 5—Address 21 Enable (A21E): Enables PA
Writing 0 in this bit enables A
cannot be modified and PA
Bit 5
A21E
0
1
Bits 4 to 1—Reserved: Read-only bits, always read as 1.
Bit 0—Bus Release Enable (BRLE): Enables or disables release of the bus to an external device.
Bit 0
BRLE
0
1
6.2.6 Chip Select Control Register (CSCR)
CSCR is an 8-bit readable/writable register that enables or disables output of chip select signals
(CS
If a chip select signal (CS
functions as a chip select signal (CS
functions. CSCR cannot be modified in single-chip mode.
CSCR is initialized to H'0F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
Initial value
Read/Write
7
to CS
Description
PA
PA
Description
The bus cannot be released to an external device; BREQ and BACK
can be used as input/output pins
The bus can be released to an external device
4
).
6
6
is the A
is the PA
CS7E
R/W
21
7
0
6
/TP
address output pin
Chip select 7 to 4 enable
These bits enable or disable
chip select signal output
7
6
to CS
6
has its ordinary input/output functions.
/TIOCA
21
CS6E
R/W
6
0
address output from PA
4
) output is selected in this register, the corresponding pin
7
2
to CS
input/output pin
CS5E
R/W
5
0
4
) output, this function taking priority over other
119
6
to be used as the A
CS4E
R/W
4
0
6
. In modes other than 3, 4, and 6 this bit
3
1
21
Reserved bits
address output pin.
2
1
1
1
(Initial value)
(Initial value)
0
1

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