MPC8533EVTALFA Freescale Semiconductor, MPC8533EVTALFA Datasheet - Page 1079

• Manufacturer Part Number: MPC8533EVTALFA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTALFA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Freescale Semiconductor
Bits
12
13
14
15
16
17
18
19
20
21
22
CDNSC Completion with data not successful. A completion with data packet was received with a non successful
CRSNC CRS non configuration. A completion was detected for a non configuration cycle and with CRS status.
Name
CRST
IOIEP
ICCA
IACA
CIEP
OAC
IOIS
MIS
CIS
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 18-23. PCI Express Error Detect Register Field Descriptions (continued)
status (i.e. UR, CA or CRS status).
1 Completion with data non successful packet was detected.
0 No completion with data non successful packet detected.
1 CRS non configuration packet was detected.
0 No CRS non configuration packet detected.
Invalid PEX_CONFIG_ADDR/PEX_CONFIG_DATA configuration access. Access to an illegal configuration
space from PEX_CONFIG_ADDR/PEX_CONFIG_DATA was detected.
1 Invalid CONFIG_ADDR/PEX_CONFIG_DATA access detected
0 No invalid PEX_CONFIG_ADDR/PEX_CONFIG_DATA access detected
Invalid ATMU configuration access. Access to an illegal configuration space from an ATMU window was
detected.
1 Invalid ATMU configuration access was detected
0 No invalid ATMU configuration access detected
CRS thresholded. An outbound configuration transaction was retried and thresholded due to a CRS
completion status. An error response is sent back to the requestor. See
Configuration Retry Timeout Register
1 A CRS threshold condition was detected for an outbound configuration transaction
0 No CRS threshold condition detected
Message invalid size. An outbound message transaction that is greater than 4 bytes or crosses a 4-byte
boundary was detected. See
information.
1 An invalid size outbound message transaction was detected
0 No invalid size outbound message transaction detected
I/O invalid size. An outbound I/O transaction that is greater than 4 bytes or crosses a 4-byte boundary was
detected.
1 an invalid size outbound I/O transaction was detected
0 no invalid size outbound I/O transaction detected
Configuration invalid size. An outbound configuration transaction that is greater than 4 bytes or crosses a
4-byte boundary was detected.
1 An invalid size outbound configuration transaction was detected
0 No invalid size outbound configuration transaction detected
Configuration invalid EP. An outbound ATMU configuration transaction request was seen when in EP mode.
1 An outbound configuration transaction while in EP was detected
0 No outbound configuration transaction in EP detected
I/O invalid EP. An outbound I/O transaction request was seen when in EP mode.
1 An outbound I/O transaction while in EP was detected
0 No outbound I/O transaction in EP detected
Outbound ATMU crossing. An outbound crossing ATMU transaction was detected.
1 An outbound transaction that hits in one window and crosses overing it was detected
0 No outbound ATMU crossing condition detected
Section 18.4.1.8.1, “Outbound ATMU Message
(PEX_CONF_RTY_TOR),” for more information.
Description
Section 18.3.2.4, “PCI Express
PCI Express Interface Controller
Generation,” for more
18-31