MPC8533EVTALFA Freescale Semiconductor, MPC8533EVTALFA Datasheet - Page 1289

• Manufacturer Part Number: MPC8533EVTALFA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTALFA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Freescale Semiconductor
0x4_1200–
0x4_10C0
0x4_10D0
0x4_11C0
0x4_11D0
0x4_10A0
0x4_10B0
0x4_10E0
0x4_10F0
0x4_11A0
0x4_11B0
0x4_11E0
0x4_11F0
0x4_12F0
0x4_1308
0x4_1310
0x4_1320
0x4_1324
0x4_1330
0x4_1340
0x4_1344
0x4_1100
0x4_1110
0x4_1120
0x4_1130
0x4_1140
0x4_1150
0x4_1160
0x4_1170
0x4_1180
0x4_1190
0x4_1300
Offset
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
IPIVPR0—IPI 0 vector/priority register
IPIVPR1—IPI 1 vector/priority register
IPIVPR2—IPI 2 vector/priority register
IPIVPR3—IPI 3 vector/priority register
SVR—Spurious vector register
TFRR—Timer frequency reporting register
GTCCR0—Global timer 0 current count register
GTBCR0—Global timer 0 base count register
GTVPR0—Global timer 0 vector/priority register
GTDR0—Global timer 0 destination register
GTCCR1—Global timer 1 current count register
GTBCR1—Global timer 1 base count register
GTVPR1—Global timer 1 vector/priority register
GTDR1—Global timer 1 destination register
GTCCR2—Global timer 2 current count register
GTBCR2—Global timer 2 base count register
GTDR2—Global timer 2 destination register
GTCCR3—Global timer 3 current count register
GTBCR3—Global timer 3 base count register
GTVPR3—Global timer 3 vector/priority register
GTDR3—Global timer 3 destination register
Reserved
TCR—Timer control register
ERQSR—External interrupt summary register
IRQSR0—IRQ_OUT summary register 0
IRQSR1—IRQ_OUT summary register 1
IRQSR2—IRQ_OUT summary register 2
CISR0—Critical Interrupt summary register 0
CISR1—Critical Interrupt summary register 1
CISR2—Critical Interrupt summary register 2
GTVPR2—Global timer 2 vector/priority register
External, IRQ_OUT, and Critical Interrupt Summary Registers
Table B-1. Memory Map (continued)
Register
Performance Monitor Mask Registers
Global Timer Registers
Complete List of Configuration, Control, and Status Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
R
R
R
R
R
R
R
R
R
R
R
0x0000_FFFF
0x8000_0000
0x0000_0000
0x0000_0000
0x8000_0000
0x8000_0000
0x0000_0001
0x0000_0000
0x8000_0000
0x8000_0000
0x0000_0001
0x0000_0000
0x8000_0000
0x8000_0000
0x0000_0001
0x0000_0000
0x8000_0000
0x8000_0000
0x0000_0001
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
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10.3.1.7/10-22
10.3.1.8/10-23
10.3.2.1/10-23
10.3.2.2/10-24
10.3.2.3/10-24
10.3.2.4/10-25
10.3.2.5/10-26
10.3.2.2/10-24
10.3.2.3/10-24
10.3.2.4/10-25
10.3.2.5/10-26
10.3.2.2/10-24
10.3.2.3/10-24
10.3.2.4/10-25
10.3.2.5/10-26
10.3.2.2/10-24
10.3.2.3/10-24
10.3.2.4/10-25
10.3.2.5/10-26
10.3.2.6/10-26
10.3.3.1/10-28
10.3.3.2/10-29
10.3.3.3/10-30
10.3.3.4/10-30
10.3.3.5/10-31
10.3.3.6/10-31
10.3.3.7/10-32
Section/Page
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B-31