MPC8533EVTALFA Freescale Semiconductor, MPC8533EVTALFA Datasheet - Page 807

• Manufacturer Part Number: MPC8533EVTALFA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTALFA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Figure 15-48
Table 15-51
15.5.3.5.14 MAC Station Address Part 2 Register (MACSTNADDR2)
The MACSTNADDR2 register is written by the user.
MACSTNADDR2 register.
Table 15-52
Freescale Semiconductor
Offset eTSEC1:0x2_4544; eTSEC3:0x2_6544
Offset eTSEC1:0x2_4540; eTSEC3:0x2_6540
Reset
Reset
W
W
R
R
16–31
8–15
0–7
Bit
16–23
24–31
Station Address, 2nd Octet
0
Station Address, 6th Octet
0
8–15
0–7
Bit
describes the fields of the MACSTNADDR1 register.
describes the fields of the MACSTNADDR2 register.
shows the MACSTNADDR1 register.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Station Address, 2nd Octet
Station Address, 1st Octet
Station Address, 6th Octet
Station Address, 5th Octet
Station Address, 4th Octet
Station Address, 3rd Octet
Figure 15-48. MAC Station Address Part 1 Register Definition
Figure 15-49. MAC Station Address Part 2 Register Definition
Name
Name
—
Table 15-51. MACSTNADDR1 Field Descriptions
Table 15-52. MACSTNADDR2 Field Descriptions
7
7
8
Station Address, 5th Octet
8
Station Address, 1st Octet
octet (station address bits 8
This field holds the first octet of the station address. The first octet
(station address bits 0
Reserved
This field holds the second octet of the station address. The second
octet (station address bits 24
This field holds the sixth octet of the station address. The sixth
octet (station address bits 40
This field holds the fifth octet of the station address. The fifth octet
(station address bits 32
This field holds the fourth octet of the station address. The fourth
This field holds the third octet of the station address. The third
octet (station address bits 16
All zeros
All zeros
Figure 15-49
15 16
15 16
Station Address, 4th Octet
–
7) defaults to a value of 0x0.
–
39) defaults to a value of 0x0.
Description
Description
–
15) defaults to a value of 0x0.
–
–
–
describes the definition for the
47) defaults to a value of 0x0.
31) defaults to a value of 0x0.
23) defaults to a value of 0x0.
Enhanced Three-Speed Ethernet Controllers
23 24
—
Station Address, 3rd Octet
Access: Read/Write
Access: Read/Write
15-77
31
31