MPC8533EVTALFA Freescale Semiconductor, MPC8533EVTALFA Datasheet - Page 1272

• Manufacturer Part Number: MPC8533EVTALFA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTALFA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Complete List of Configuration, Control, and Status Registers
B-14
0x1C8
0x248
0x1BC
0x1FC
0x19C
0x1A0
0x1A4
0x1A8
0x1B0
0x1B4
0x1B8
0x1C0
0x1C4
0x20C
0x21C
0x23C
0x27C
0x200
0x204
0x208
0x210
0x214
0x218
0x220
0x224
0x228
0x230
0x234
0x238
0x240
0x244
0x280
Offset
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–
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
DAR1—DMA 1 destination address register
BCR1—DMA 1 byte count register
ENLNDAR1—DMA 1 next link descriptor extended address
register
NLNDAR1—DMA 1 next link descriptor address register
ECLSDAR1—DMA 1 current list descriptor extended address
register
CLSDAR1—DMA 1 current list descriptor address register
ENLSDAR1—DMA 1 next list descriptor extended address
register
NLSDAR1—DMA 1 next list descriptor address register
SSR1—DMA 1 source stride register
DSR1—DMA 1 destination stride register
Reserved
MR2—DMA 2 mode register
SR2—DMA 2 status register
ECLNDAR2—DMA 2 current link descriptor extended
address register
CLNDAR2—DMA 2 current link descriptor address register
SATR2—DMA 2 source attributes register
SAR2—DMA 2 source address register
DATR2—DMA 2 destination attributes register
DAR2—DMA 2 destination address register
BCR2—DMA 2 byte count register
ENLNDAR2—DMA 2 next link descriptor extended address
register
NLNDAR2—DMA 2 next link descriptor address register
ECLSDAR2—DMA 2 current list descriptor extended address
register
CLSDAR2—DMA 2 current list descriptor address register
ENLSDAR2—DMA 2 next list descriptor extended address
register
NLSDAR2—DMA 2 next list descriptor address register
SSR2—DMA 2 source stride register
DSR2—DMA 2 destination stride register
Reserved
MR3—DMA 3 mode register
Table B-1. Memory Map (continued)
Register
Access
Mixed
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
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Freescale Semiconductor
16.3.1.10/16-21
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16.3.1.11/16-22
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16.3.1.13/16-23
16.3.1.10/16-21
16.3.1.10/16-21
16.3.1.11/16-22
16.3.1.11/16-22
16.3.1.12/16-22
16.3.1.13/16-23
16.3.1.7/16-18
16.3.1.8/16-19
16.3.1.9/16-19
16.3.1.9/16-19
16.3.1.1/16-10
16.3.1.2/16-12
16.3.1.3/16-13
16.3.1.3/16-13
16.3.1.4/16-15
16.3.1.5/16-16
16.3.1.6/16-17
16.3.1.7/16-18
16.3.1.8/16-19
16.3.1.9/16-19
16.3.1.9/16-19
16.3.1.1/16-10
Section/Page
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