MPC8533EVTALFA Freescale Semiconductor, MPC8533EVTALFA Datasheet - Page 509

• Manufacturer Part Number: MPC8533EVTALFA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTALFA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Table 12-13
12.4.1.8
The PKEU interrupt control register controls the result of detected errors. For a given error (as defined in
Section 12.4.1.7, “PKEU Interrupt Status Register
is set, then the error is disabled; no error interrupt occurs and the interrupt status register is not updated to
reflect the error. If the corresponding bit is not set, then upon detection of an error, the PKEU interrupt
status register is updated to reflect the error, causing assertion of the error interrupt signal, and causing the
module to halt processing.
Freescale Semiconductor
58–63
0–49
Bits
50
51
52
53
54
55
56
57
Name
DSE
INV
KSE Key size error. Value outside the bounds of 1–256 bytes was written to the PKEU key size register
CE
ME
AE
—
—
—
IE
describes PKEU interrupt status register fields.
PKEU Interrupt Control Register (PKEUICR)
Reserved
Inversion error. Indicates that the inversion routine has a zero operand.
0 No inversion error detected
1 Inversion error detected
Internal error. An internal processing error was detected while the PKEU was operating.
0 No error detected
1 Internal error
Note: This bit will be asserted any time an enabled error condition occurs and can only be cleared by setting
Reserved
Context error. A PKEU key register, the key size register, the data size register, or mode register was modified
while the PKEU was operating.
0 No error detected
1 Context error
0 No error detected
1 Key size error detected
Data size error. Value outside the bounds 97– 2048 bits was written to the PKEU data size register
0 No error detected
1 Data size error detected
Mode error. An illegal value was detected in the mode register.
0 No error detected
1 Mode error
Note: Writing to reserved bits in a mode register is a likely source of error.
Address error. Illegal read or write address was detected within the PKEU address space.
0 No error detected
1 Address error
Reserved
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
the corresponding bit in the interrupt control register or by resetting the PKEU.
Table 12-13. PKEU interrupt Status Register Field Descriptions
(PKEUISR)”), if the corresponding bit in this register
Description
Security Engine (SEC) 2.1
12-31