MPC8533EVTALFA Freescale Semiconductor, MPC8533EVTALFA Datasheet - Page 356

• Manufacturer Part Number: MPC8533EVTALFA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTALFA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

DDR Memory Controller
9.4.1.21
The memory data path error injection mask ECC register, shown in
enables errors to be written to ECC memory, and allows the ECC byte to mirror the most significant data
byte.
Table 9-27
9.4.1.22
The memory data path read capture high register, shown in
data path during error capture.
Table 9-28
9-34
24–31
0–21
0–31
Offset 0xE08
Reset
Bits
Bits
22
23
Offset 0xE20
Reset
W
R
W
R
0
ECHD Error capture high data path. Captures the high word of the data path when errors are detected.
Name
Name
EEIM ECC error injection mask. Setting a mask bit causes the corresponding ECC bit to be inverted on memory
EIEN
EMB
—
0
describes the ERR_INJECT fields.
describes the CAPTURE_DATA_HI fields.
Figure 9-23. Memory Data Path Read Capture High Register (CAPTURE_DATA_HI)
Figure 9-22. Memory Data Path Error Injection Mask ECC Register (ERR_INJECT)
Memory Data Path Error Injection Mask ECC (ERR_INJECT)
Memory Data Path Read Capture High (CAPTURE_DATA_HI)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Reserved
ECC mirror byte
0 Mirror byte functionality disabled.
1 Mirror the most significant data path byte onto the ECC byte.
Error injection enable
0 Error injection disabled.
1 Error injection enabled. This applies to the data mask bits, the ECC mask bits, and the ECC mirror bit. Note
bus writes.
that error injection should not be enabled until the memory controller has been enabled via
DDR_SDRAM_CFG[MEM_EN].
Table 9-28. CAPTURE_DATA_HI Field Descriptions
Table 9-27. ERR_INJECT Field Descriptions
—
All zeros
All zeros
ECHD
Description
Description
Figure
9-23, stores the high word of the read
Figure
21
EMB EIEN
22
9-22, sets the ECC mask,
23
24
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
EEIM
31
31