XC3S400-4FT256C Xilinx Inc, XC3S400-4FT256C Datasheet - Page 118

• Manufacturer Part Number: XC3S400-4FT256C
• Description: SEMI CONDUCTOR
• Manufacturer: Xilinx Inc

Specifications of XC3S400-4FT256C

• Case: BGA
• Dc: 04+

Spartan-3 FPGA Family: Pinout Descriptions
Table 79: Bitstream Options Affecting Spartan-3 Pins (Continued)
Setting Bitstream Generator Options
Refer to the
umentation.
Package Overview
Table 80
package styles for the Spartan-3 family. Each package style
is available as a standard and an environmentally-friendly
lead-free (Pb-free) option. The Pb-free packages include an
Table 80: Spartan-3 Family Package Options
118
M0
HSWAP_EN
TDI
TMS
TCK
TDO
FG1156 / FGG1156
VQ100 / VQG100
PQ208 / PQG208
CP132 / CPG132
TQ144 / TQG144
FG320 / FGG320
FG456 / FGG456
FG676 / FGG676
FG900 / FGG900
FT256 / FTG256
Affected Pin
Package
Name(s)
shows the 10 low-cost, space-saving production
“BitGen” chapter
After configuration, this bitstream option either pulls M0 to
VCCAUX via a pull-up resistor, to ground via a pull-down resistor,
or allows M0 to float.
After configuration, this bitstream option either pulls HSWAP_EN
to VCCAUX via a pull-up resistor, to ground via a pull-down
resistor, or allows HSWAP_EN to float.
After configuration, this bitstream option either pulls TDI to
VCCAUX via a pull-up resistor, to ground via a pull-down resistor,
or allows TDI to float.
After configuration, this bitstream option either pulls TMS to
VCCAUX via a pull-up resistor, to ground via a pull-down resistor,
or allows TMS to float.
After configuration, this bitstream option either pulls TCK to
VCCAUX via a pull-up resistor, to ground via a pull-down resistor,
or allows TCK to float.
After configuration, this bitstream option either pulls TDO to
VCCAUX via a pull-up resistor, to ground via a pull-down resistor,
or allows TDO to float.
Leads
1156
100
132
144
208
256
320
456
676
900
in the Xilinx ISE software doc-
Very-thin Quad Flat Pack
Chip-Scale Package
Thin Quad Flat Pack
Quad Flat Pack
Fine-pitch, Thin Ball Grid Array
Fine-pitch Ball Grid Array
Fine-pitch Ball Grid Array
Fine-pitch Ball Grid Array
Fine-pitch Ball Grid Array
Fine-pitch Ball Grid Array
Bitstream Generation Function
Type
www.xilinx.com
extra ‘G’ in the package style name. For example, the stan-
dard "VQ100" package becomes "VQG100" when ordered
as the Pb-free option. The mechanical dimensions of the
standard and Pb-free packages are similar, as shown in the
mechanical drawings provided in
Not all Spartan-3 densities are available in all packages.
However, for a specific package there is a common footprint
for that supports the various devices available in that pack-
age. See the footprint diagrams that follow.
Maximum
141
173
221
333
489
633
784
I/O
63
89
97
Pitch
(mm)
0.5
0.5
0.5
0.5
1.0
1.0
1.0
1.0
1.0
1.0
HswapenPin •
Variable
TmsPin
Option
DS099-4 (v2.2) May 25, 2007
TdoPin
TckPin
M0Pin
TdiPin
Name
30.6 x 30.6
Table
16 x 16
22 x 22
17 x 17
19 x 19
23 x 23
27 x 27
31 x 31
35 x 35
(mm)
Area
8 x 8
Product Specification
82.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
(default
Values
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
value)
Height
(mm)
1.20
1.10
1.60
4.10
1.55
2.00
2.60
2.60
2.60
2.60
R