XC3S400-4FT256C Xilinx Inc, XC3S400-4FT256C Datasheet - Page 89

no-image

XC3S400-4FT256C

Manufacturer Part Number
XC3S400-4FT256C
Description
SEMI CONDUCTOR
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC3S400-4FT256C

Case
BGA
Dc
04+

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3S400-4FT256C
Manufacturer:
ISSI
Quantity:
101
Part Number:
XC3S400-4FT256C
Manufacturer:
XILINX
0
Part Number:
XC3S400-4FT256C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Part Number:
XC3S400-4FT256C0985
Manufacturer:
XILINX
Quantity:
6 633
Part Number:
XC3S400-4FT256CES
Manufacturer:
XILINX
0
Table 60: Switching Characteristics for the DFS
Notes:
1.
2.
3.
4.
5.
DS099-3 (v2.2) May 25, 2007
Product Specification
98
Output Frequency Ranges
CLKOUT_FREQ_FX_LF
CLKOUT_FREQ_FX_HF
Output Clock Jitter
CLKOUT_PER_JITT_FX
Duty Cycle
CLKOUT_DUTY_CYCLE_FX
Phase Alignment
CLKOUT_PHASE
Lock Time
LOCK_DLL_FX
LOCK_FX
The numbers in this table are based on the operating conditions set forth in
DFS specifications apply when either of the DFS outputs (CLKFX or CLKFX180) is in use.
The Virtex-II Jitter Calculator at
in the ISE software for a Spartan-3 specific number. Jitter number assumes 150 ps of input clock jitter.
The CLKFX and CLKFX180 outputs always approximate 50% duty cycles.
The mask revision code appears on the device top marking. See
Symbol
(4)
R
Frequency for the CLKFX and CLKFX180
outputs
Period jitter at the CLKFX and CLKFX180
outputs
Duty cycle precision for the CLKFX and
CLKFX180 outputs
Phase offset between the DFS output and
the CLK0 output
When using the DFS in conjunction with the
DLL: The time from deassertion at the DCM’s
Reset input to the rising transition at its
LOCKED output. When the DCM is locked,
the CLKIN and CLKFB signals are in phase.
When using the DFS without the DLL: The
time from deassertion at the DCM’s Reset
input to the rising transition at its LOCKED
output. By asserting the LOCKED signal, the
DFS indicates valid CLKFX and CLKFX180
signals.
http://www.xilinx.com/applications/web_ds_v2/jitter_calc.htm
Description
www.xilinx.com
Package Marking, page
Spartan-3 FPGA Family: DC and Switching Characteristics
Frequency
Table 31
Mode
High
Low
All
All
All
All
All
and
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
Table
‘A’ – ‘D’
revisions
revisions
7.
Device
‘E’ and
later
Mask
Mask
All
All
All
All
All
59.
(5)
(5)
provides an estimate. Use the DCM Clock Wizard
Note 3
Min
210
210
18
-
-
-
-
-
-
-
-
-
-
-
-5
Note 3
±
±
±
±
±
±
±
±
±
Speed Grade
Max
10.0
10.0
210
280
326
100
100
250
400
400
400
400
400
300
Note 3
Min
210
210
18
-
-
-
-
-
-
-
-
-
-
-
-4
Note 3
±
±
±
±
±
±
±
±
±
Max
10.0
10.0
210
280
307
100
100
250
400
400
400
400
400
300
Units
MHz
MHz
MHz
ms
ms
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
89

Related parts for XC3S400-4FT256C