XC3S400-4FT256C Xilinx Inc, XC3S400-4FT256C Datasheet - Page 162

• Manufacturer Part Number: XC3S400-4FT256C
• Description: SEMI CONDUCTOR
• Manufacturer: Xilinx Inc

Specifications of XC3S400-4FT256C

• Case: BGA
• Dc: 04+

Spartan-3 FPGA Family: Pinout Descriptions
FG676: 676-lead Fine-pitch Ball Grid
Array
The 676-lead fine-pitch ball grid array package, FG676,
supports four different Spartan-3 devices, including the
XC3S1000, the XC3S1500, the XC3S2000, and the
XC3S4000. All four have nearly identical footprints but are
slightly different due to unconnected pins on the XC3S1000
and XC3S1500. For example, because the XC3S1000 has
fewer I/O pins, this device has 98 unconnected pins on the
FG676 package, labeled as “N.C.” In
Figure
black diamond symbol ( ). The XC3S1500, however, has
only two unconnected pins, also labeled “N.C.” in the pinout
table but indicated with a black square symbol ( ).
All the package pins appear in
bank number, then by pin name. Pairs of pins that form a
differential I/O pair appear together in the table. The table
also shows the pin number for each pin and the pin type, as
defined earlier.
If there is a difference between the XC3S1000, the
XC3S1500, the XC3S2000, and the XC3S4000 pinouts,
then that difference is highlighted in
entry is shaded grey, then there is an unconnected pin on
either the XC3S1000 or XC3S1500 that maps to a user-I/O
pin on the XC3S2000 and XC3S4000. If the table entry is
shaded tan, then the unconnected pin on either the
XC3S1000 or XC3S1500 maps to a VREF-type pin on the
XC3S2000 and XC3S4000. If the other VREF pins in the
bank all connect to a voltage reference to support a special
I/O standard, then also connect the N.C. pin on the
XC3S1000 or XC3S1500 to the same VREF voltage. This
provides maximum flexibility as you could potentially
migrate a design from the XC3S1000 through to the
XC3S4000 FPGA without changing the printed circuit
board.
An electronic version of this package pinout table and foot-
print diagram is available for download from the Xilinx web-
site at
Pinout Table
Table 102: FG676 Package Pinout
162
Bank
0
0
0
0
0
0
0
0
0
IO
IO
IO
IO
N.C. ( )
IO
IO
IO
IO
http://www.xilinx.com/bvdocs/publications/s3_pin.zip
49, these unconnected pins are indicated with a
XC3S1000
Pin Name
IO
IO
IO
IO
IO
IO
IO
IO
IO
XC3S1500
Pin Name
IO
IO
IO
IO
IO
IO
IO
IO
IO
Table 102
XC3S2000
XC3S4000
Pin Name
Table
and are sorted by
Number
102. If the table
FG676
Table 102
C12
E13
H11
H12
Pin
A3
A5
A6
C4
C8
Type
www.xilinx.com
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
and
.
Table 102: FG676 Package Pinout (Continued)
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IO/VREF_0
IO/VREF_0
IO/VREF_0
IO_L01N_0/
VRP_0
IO_L01P_0/
VRN_0
IO_L05N_0
IO_L05P_0/
VREF_0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L09P_0
IO_L10N_0
IO_L10P_0
N.C. ( )
N.C. ( )
N.C. ( )
N.C. ( )
IO_L15N_0
IO_L15P_0
IO_L16N_0
IO_L16P_0
N.C. ( )
N.C. ( )
N.C. ( )
N.C. ( )
IO_L19N_0
IO_L19P_0
IO_L22N_0
IO_L22P_0
N.C. ( )
N.C. ( )
IO_L24N_0
IO_L24P_0
IO_L25N_0
IO_L25P_0
N.C. ( )
N.C. ( )
IO_L27N_0
IO_L27P_0
XC3S1000
Pin Name
IO/VREF_0
IO/VREF_0
IO/VREF_0
IO_L01N_0/
VRP_0
IO_L01P_0/
VRN_0
IO_L05N_0
IO_L05P_0/
VREF_0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L09P_0
IO_L10N_0
IO_L10P_0
IO_L11N_0
IO_L11P_0
IO_L12N_0
IO_L12P_0
IO_L15N_0
IO_L15P_0
IO_L16N_0
IO_L16P_0
IO_L17N_0
IO_L17P_0
IO_L18N_0
IO_L18P_0
IO_L19N_0
IO_L19P_0
IO_L22N_0
IO_L22P_0
IO_L23N_0
IO_L23P_0
IO_L24N_0
IO_L24P_0
IO_L25N_0
IO_L25P_0
IO_L26N_0
IO_L26P_0/
VREF_0
IO_L27N_0
IO_L27P_0
XC3S1500
Pin Name
IO/VREF_0
IO/VREF_0
IO/VREF_0
IO_L01N_0/
VRP_0
IO_L01P_0/
VRN_0
IO_L05N_0
IO_L05P_0/
VREF_0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L09P_0
IO_L10N_0
IO_L10P_0
IO_L11N_0
IO_L11P_0
IO_L12N_0
IO_L12P_0
IO_L15N_0
IO_L15P_0
IO_L16N_0
IO_L16P_0
IO_L17N_0
IO_L17P_0
IO_L18N_0
IO_L18P_0
IO_L19N_0
IO_L19P_0
IO_L22N_0
IO_L22P_0
IO_L23N_0
IO_L23P_0
IO_L24N_0
IO_L24P_0
IO_L25N_0
IO_L25P_0
IO_L26N_0
IO_L26P_0/
VREF_0
IO_L27N_0
IO_L27P_0
XC3S2000
XC3S4000
Pin Name
DS099-4 (v2.2) May 25, 2007
Product Specification
Number
FG676
G10
G12
F10
E10
D10
C10
B10
A10
G11
E11
D11
B11
A11
H13
Pin
F11
D5
C5
D6
C6
D7
G8
D8
G9
D9
C9
B3
F7
E5
B4
A4
B5
E6
B6
E7
B7
A7
F8
E8
B8
A8
F9
E9
B9
VREF
VREF
VREF
VREF
VREF
Type
DCI
DCI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
R