XC3S400-4FT256C Xilinx Inc, XC3S400-4FT256C Datasheet - Page 17
XC3S400-4FT256C
Manufacturer Part Number
XC3S400-4FT256C
Description
SEMI CONDUCTOR
Manufacturer
Xilinx Inc
Datasheet
1.XC3S400-4FT256C.pdf
(208 pages)
Specifications of XC3S400-4FT256C
Case
BGA
Dc
04+
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match the characteristic impedance of the transmission
line. This adjustment process compensates for differences
in I/O impedance that can result from normal variation in the
ambient temperature, the supply voltage and the manufac-
turing process. When the output driver turns off, the series
termination, by definition, approaches a very high imped-
ance; in contrast, parallel termination resistors remain at the
targeted values.
DCI is available only for certain I/O standards, as listed in
Table
standard extensions to symbols or components. There are
Table 9: DCI I/O Standards
DS099-2 (v2.2) May 25, 2007
Product Specification
Single-Ended
Gunning
Transceiver Logic
High-Speed
Transceiver Logic
Low-Voltage CMOS
Stub Series
Terminated Logic
Category of Signal
9. DCI is selected by applying the appropriate I/O
Standard
R
GTL_DCI
GTLP_DCI
HSTL_I_DCI
HSTL_III_DCI
HSTL_I_DCI_18
HSTL_II_DCI_18
DIFF_HSTL_II_18_DCI
HSTL_III_DCI_18
LVDCI_15
LVDCI_18
LVDCI_25
LVDCI_33
LVDCI_DV2_15
LVDCI_DV2_18
LVDCI_DV2_25
LVDCI_DV2_33
SSTL18_I_DCI
SSTL2_I_DCI
SSTL2_II_DCI
DIFF_SSTL2_II_DCI
Signal Standard
(IOSTANDARD)
(3)
Outputs
For
1.2
1.5
1.5
1.5
1.8
1.8
1.8
1.5
1.8
2.5
3.3
1.5
1.8
2.5
3.3
1.8
2.5
2.5
www.xilinx.com
V
CCO
(V)
Inputs
five basic ways to configure terminations, as shown in
Table
terminations is put into effect.
HSTL_I_DCI-, HSTL_III_DCI-, and SSTL2_I_DCI-type out-
puts do not require the VRN and VRP reference resistors.
Likewise, LVDCI-type inputs do not require the VRN and
VRP reference resistors. In a bank without any DCI I/O or a
bank containing non-DCI I/O and purely HSTL_I_DCI- or
HSTL_III_DCI-type outputs, or SSTL2_I_DCI-type outputs
or LVDCI-type inputs, the associated VRN and VRP pins
can be used as general-purpose I/O pins.
For
1.2
1.5
1.5
1.5
1.8
1.8
1.8
1.5
1.8
2.5
3.3
1.5
1.8
2.5
3.3
1.8
2.5
2.5
10. The DCI I/O standard determines which of these
Spartan-3 FPGA Family: Functional Description
Inputs (V)
V
REF
0.75
1.25
1.25
0.8
1.0
0.9
0.9
0.9
1.1
0.9
-
-
-
-
-
-
-
-
for
Controlled driver with
Split with 25-Ohm
impedance driver
half-impedance
25-Ohm driver
25-Ohm driver
At Output
Controlled
Termination Type
Single
driver
None
None
None
None
Split
At Input
Single
Single
Single
None
Split
Split
Split
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